cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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earlycon-arm-semihost.c (1174B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Copyright (C) 2012 ARM Ltd.
      4 * Author: Marc Zyngier <marc.zyngier@arm.com>
      5 *
      6 * Adapted for ARM and earlycon:
      7 * Copyright (C) 2014 Linaro Ltd.
      8 * Author: Rob Herring <robh@kernel.org>
      9 */
     10#include <linux/kernel.h>
     11#include <linux/console.h>
     12#include <linux/init.h>
     13#include <linux/serial_core.h>
     14
     15#ifdef CONFIG_THUMB2_KERNEL
     16#define SEMIHOST_SWI	"0xab"
     17#else
     18#define SEMIHOST_SWI	"0x123456"
     19#endif
     20
     21/*
     22 * Semihosting-based debug console
     23 */
     24static void smh_putc(struct uart_port *port, unsigned char c)
     25{
     26#ifdef CONFIG_ARM64
     27	asm volatile("mov  x1, %0\n"
     28		     "mov  x0, #3\n"
     29		     "hlt  0xf000\n"
     30		     : : "r" (&c) : "x0", "x1", "memory");
     31#else
     32	asm volatile("mov  r1, %0\n"
     33		     "mov  r0, #3\n"
     34		     "svc  " SEMIHOST_SWI "\n"
     35		     : : "r" (&c) : "r0", "r1", "memory");
     36#endif
     37}
     38
     39static void smh_write(struct console *con, const char *s, unsigned n)
     40{
     41	struct earlycon_device *dev = con->data;
     42	uart_console_write(&dev->port, s, n, smh_putc);
     43}
     44
     45static int
     46__init early_smh_setup(struct earlycon_device *device, const char *opt)
     47{
     48	device->con->write = smh_write;
     49	return 0;
     50}
     51EARLYCON_DECLARE(smh, early_smh_setup);