cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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imx_earlycon.c (1295B)


      1// SPDX-License-Identifier: GPL-2.0+
      2/*
      3 * Copyright 2020 NXP
      4 */
      5
      6#include <linux/module.h>
      7#include <linux/ioport.h>
      8#include <linux/init.h>
      9#include <linux/serial_core.h>
     10#include <linux/serial.h>
     11#include <linux/delay.h>
     12#include <linux/of.h>
     13#include <linux/io.h>
     14
     15#define URTX0 0x40 /* Transmitter Register */
     16#define UTS_TXFULL (1<<4) /* TxFIFO full */
     17#define IMX21_UTS 0xb4 /* UART Test Register on all other i.mx*/
     18
     19static void imx_uart_console_early_putchar(struct uart_port *port, unsigned char ch)
     20{
     21	while (readl_relaxed(port->membase + IMX21_UTS) & UTS_TXFULL)
     22		cpu_relax();
     23
     24	writel_relaxed(ch, port->membase + URTX0);
     25}
     26
     27static void imx_uart_console_early_write(struct console *con, const char *s,
     28					 unsigned count)
     29{
     30	struct earlycon_device *dev = con->data;
     31
     32	uart_console_write(&dev->port, s, count, imx_uart_console_early_putchar);
     33}
     34
     35static int __init
     36imx_console_early_setup(struct earlycon_device *dev, const char *opt)
     37{
     38	if (!dev->port.membase)
     39		return -ENODEV;
     40
     41	dev->con->write = imx_uart_console_early_write;
     42
     43	return 0;
     44}
     45OF_EARLYCON_DECLARE(ec_imx6q, "fsl,imx6q-uart", imx_console_early_setup);
     46OF_EARLYCON_DECLARE(ec_imx21, "fsl,imx21-uart", imx_console_early_setup);
     47
     48MODULE_AUTHOR("NXP");
     49MODULE_DESCRIPTION("IMX earlycon driver");
     50MODULE_LICENSE("GPL");