cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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vr41xx_siu.c (19747B)


      1// SPDX-License-Identifier: GPL-2.0+
      2/*
      3 *  Driver for NEC VR4100 series Serial Interface Unit.
      4 *
      5 *  Copyright (C) 2004-2008  Yoichi Yuasa <yuasa@linux-mips.org>
      6 *
      7 *  Based on drivers/serial/8250.c, by Russell King.
      8 */
      9
     10#include <linux/console.h>
     11#include <linux/errno.h>
     12#include <linux/init.h>
     13#include <linux/interrupt.h>
     14#include <linux/ioport.h>
     15#include <linux/module.h>
     16#include <linux/platform_device.h>
     17#include <linux/serial.h>
     18#include <linux/serial_core.h>
     19#include <linux/serial_reg.h>
     20#include <linux/tty.h>
     21#include <linux/tty_flip.h>
     22
     23#include <linux/io.h>
     24#include <asm/vr41xx/siu.h>
     25#include <asm/vr41xx/vr41xx.h>
     26
     27#define SIU_BAUD_BASE	1152000
     28#define SIU_MAJOR	204
     29#define SIU_MINOR_BASE	82
     30
     31#define RX_MAX_COUNT	256
     32#define TX_MAX_COUNT	15
     33
     34#define SIUIRSEL	0x08
     35 #define TMICMODE	0x20
     36 #define TMICTX		0x10
     37 #define IRMSEL		0x0c
     38 #define IRMSEL_HP	0x08
     39 #define IRMSEL_TEMIC	0x04
     40 #define IRMSEL_SHARP	0x00
     41 #define IRUSESEL	0x02
     42 #define SIRSEL		0x01
     43
     44static struct uart_port siu_uart_ports[SIU_PORTS_MAX] = {
     45	[0 ... SIU_PORTS_MAX-1] = {
     46		.lock	= __SPIN_LOCK_UNLOCKED(siu_uart_ports->lock),
     47		.irq	= 0,
     48	},
     49};
     50
     51#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
     52static uint8_t lsr_break_flag[SIU_PORTS_MAX];
     53#endif
     54
     55#define siu_read(port, offset)		readb((port)->membase + (offset))
     56#define siu_write(port, offset, value)	writeb((value), (port)->membase + (offset))
     57
     58void vr41xx_select_siu_interface(siu_interface_t interface)
     59{
     60	struct uart_port *port;
     61	unsigned long flags;
     62	uint8_t irsel;
     63
     64	port = &siu_uart_ports[0];
     65
     66	spin_lock_irqsave(&port->lock, flags);
     67
     68	irsel = siu_read(port, SIUIRSEL);
     69	if (interface == SIU_INTERFACE_IRDA)
     70		irsel |= SIRSEL;
     71	else
     72		irsel &= ~SIRSEL;
     73	siu_write(port, SIUIRSEL, irsel);
     74
     75	spin_unlock_irqrestore(&port->lock, flags);
     76}
     77EXPORT_SYMBOL_GPL(vr41xx_select_siu_interface);
     78
     79void vr41xx_use_irda(irda_use_t use)
     80{
     81	struct uart_port *port;
     82	unsigned long flags;
     83	uint8_t irsel;
     84
     85	port = &siu_uart_ports[0];
     86
     87	spin_lock_irqsave(&port->lock, flags);
     88
     89	irsel = siu_read(port, SIUIRSEL);
     90	if (use == FIR_USE_IRDA)
     91		irsel |= IRUSESEL;
     92	else
     93		irsel &= ~IRUSESEL;
     94	siu_write(port, SIUIRSEL, irsel);
     95
     96	spin_unlock_irqrestore(&port->lock, flags);
     97}
     98EXPORT_SYMBOL_GPL(vr41xx_use_irda);
     99
    100void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed)
    101{
    102	struct uart_port *port;
    103	unsigned long flags;
    104	uint8_t irsel;
    105
    106	port = &siu_uart_ports[0];
    107
    108	spin_lock_irqsave(&port->lock, flags);
    109
    110	irsel = siu_read(port, SIUIRSEL);
    111	irsel &= ~(IRMSEL | TMICTX | TMICMODE);
    112	switch (module) {
    113	case SHARP_IRDA:
    114		irsel |= IRMSEL_SHARP;
    115		break;
    116	case TEMIC_IRDA:
    117		irsel |= IRMSEL_TEMIC | TMICMODE;
    118		if (speed == IRDA_TX_4MBPS)
    119			irsel |= TMICTX;
    120		break;
    121	case HP_IRDA:
    122		irsel |= IRMSEL_HP;
    123		break;
    124	default:
    125		break;
    126	}
    127	siu_write(port, SIUIRSEL, irsel);
    128
    129	spin_unlock_irqrestore(&port->lock, flags);
    130}
    131EXPORT_SYMBOL_GPL(vr41xx_select_irda_module);
    132
    133static inline void siu_clear_fifo(struct uart_port *port)
    134{
    135	siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO);
    136	siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
    137	                          UART_FCR_CLEAR_XMIT);
    138	siu_write(port, UART_FCR, 0);
    139}
    140
    141static inline unsigned long siu_port_size(struct uart_port *port)
    142{
    143	switch (port->type) {
    144	case PORT_VR41XX_SIU:
    145		return 11UL;
    146	case PORT_VR41XX_DSIU:
    147		return 8UL;
    148	}
    149
    150	return 0;
    151}
    152
    153static inline unsigned int siu_check_type(struct uart_port *port)
    154{
    155	if (port->line == 0)
    156		return PORT_VR41XX_SIU;
    157	if (port->line == 1 && port->irq)
    158		return PORT_VR41XX_DSIU;
    159
    160	return PORT_UNKNOWN;
    161}
    162
    163static inline const char *siu_type_name(struct uart_port *port)
    164{
    165	switch (port->type) {
    166	case PORT_VR41XX_SIU:
    167		return "SIU";
    168	case PORT_VR41XX_DSIU:
    169		return "DSIU";
    170	}
    171
    172	return NULL;
    173}
    174
    175static unsigned int siu_tx_empty(struct uart_port *port)
    176{
    177	uint8_t lsr;
    178
    179	lsr = siu_read(port, UART_LSR);
    180	if (lsr & UART_LSR_TEMT)
    181		return TIOCSER_TEMT;
    182
    183	return 0;
    184}
    185
    186static void siu_set_mctrl(struct uart_port *port, unsigned int mctrl)
    187{
    188	uint8_t mcr = 0;
    189
    190	if (mctrl & TIOCM_DTR)
    191		mcr |= UART_MCR_DTR;
    192	if (mctrl & TIOCM_RTS)
    193		mcr |= UART_MCR_RTS;
    194	if (mctrl & TIOCM_OUT1)
    195		mcr |= UART_MCR_OUT1;
    196	if (mctrl & TIOCM_OUT2)
    197		mcr |= UART_MCR_OUT2;
    198	if (mctrl & TIOCM_LOOP)
    199		mcr |= UART_MCR_LOOP;
    200
    201	siu_write(port, UART_MCR, mcr);
    202}
    203
    204static unsigned int siu_get_mctrl(struct uart_port *port)
    205{
    206	uint8_t msr;
    207	unsigned int mctrl = 0;
    208
    209	msr = siu_read(port, UART_MSR);
    210	if (msr & UART_MSR_DCD)
    211		mctrl |= TIOCM_CAR;
    212	if (msr & UART_MSR_RI)
    213		mctrl |= TIOCM_RNG;
    214	if (msr & UART_MSR_DSR)
    215		mctrl |= TIOCM_DSR;
    216	if (msr & UART_MSR_CTS)
    217		mctrl |= TIOCM_CTS;
    218
    219	return mctrl;
    220}
    221
    222static void siu_stop_tx(struct uart_port *port)
    223{
    224	unsigned long flags;
    225	uint8_t ier;
    226
    227	spin_lock_irqsave(&port->lock, flags);
    228
    229	ier = siu_read(port, UART_IER);
    230	ier &= ~UART_IER_THRI;
    231	siu_write(port, UART_IER, ier);
    232
    233	spin_unlock_irqrestore(&port->lock, flags);
    234}
    235
    236static void siu_start_tx(struct uart_port *port)
    237{
    238	unsigned long flags;
    239	uint8_t ier;
    240
    241	spin_lock_irqsave(&port->lock, flags);
    242
    243	ier = siu_read(port, UART_IER);
    244	ier |= UART_IER_THRI;
    245	siu_write(port, UART_IER, ier);
    246
    247	spin_unlock_irqrestore(&port->lock, flags);
    248}
    249
    250static void siu_stop_rx(struct uart_port *port)
    251{
    252	unsigned long flags;
    253	uint8_t ier;
    254
    255	spin_lock_irqsave(&port->lock, flags);
    256
    257	ier = siu_read(port, UART_IER);
    258	ier &= ~UART_IER_RLSI;
    259	siu_write(port, UART_IER, ier);
    260
    261	port->read_status_mask &= ~UART_LSR_DR;
    262
    263	spin_unlock_irqrestore(&port->lock, flags);
    264}
    265
    266static void siu_enable_ms(struct uart_port *port)
    267{
    268	unsigned long flags;
    269	uint8_t ier;
    270
    271	spin_lock_irqsave(&port->lock, flags);
    272
    273	ier = siu_read(port, UART_IER);
    274	ier |= UART_IER_MSI;
    275	siu_write(port, UART_IER, ier);
    276
    277	spin_unlock_irqrestore(&port->lock, flags);
    278}
    279
    280static void siu_break_ctl(struct uart_port *port, int ctl)
    281{
    282	unsigned long flags;
    283	uint8_t lcr;
    284
    285	spin_lock_irqsave(&port->lock, flags);
    286
    287	lcr = siu_read(port, UART_LCR);
    288	if (ctl == -1)
    289		lcr |= UART_LCR_SBC;
    290	else
    291		lcr &= ~UART_LCR_SBC;
    292	siu_write(port, UART_LCR, lcr);
    293
    294	spin_unlock_irqrestore(&port->lock, flags);
    295}
    296
    297static inline void receive_chars(struct uart_port *port, uint8_t *status)
    298{
    299	uint8_t lsr, ch;
    300	char flag;
    301	int max_count = RX_MAX_COUNT;
    302
    303	lsr = *status;
    304
    305	do {
    306		ch = siu_read(port, UART_RX);
    307		port->icount.rx++;
    308		flag = TTY_NORMAL;
    309
    310#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
    311		lsr |= lsr_break_flag[port->line];
    312		lsr_break_flag[port->line] = 0;
    313#endif
    314		if (unlikely(lsr & (UART_LSR_BI | UART_LSR_FE |
    315		                    UART_LSR_PE | UART_LSR_OE))) {
    316			if (lsr & UART_LSR_BI) {
    317				lsr &= ~(UART_LSR_FE | UART_LSR_PE);
    318				port->icount.brk++;
    319
    320				if (uart_handle_break(port))
    321					goto ignore_char;
    322			}
    323
    324			if (lsr & UART_LSR_FE)
    325				port->icount.frame++;
    326			if (lsr & UART_LSR_PE)
    327				port->icount.parity++;
    328			if (lsr & UART_LSR_OE)
    329				port->icount.overrun++;
    330
    331			lsr &= port->read_status_mask;
    332			if (lsr & UART_LSR_BI)
    333				flag = TTY_BREAK;
    334			if (lsr & UART_LSR_FE)
    335				flag = TTY_FRAME;
    336			if (lsr & UART_LSR_PE)
    337				flag = TTY_PARITY;
    338		}
    339
    340		if (uart_handle_sysrq_char(port, ch))
    341			goto ignore_char;
    342
    343		uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
    344
    345	ignore_char:
    346		lsr = siu_read(port, UART_LSR);
    347	} while ((lsr & UART_LSR_DR) && (max_count-- > 0));
    348
    349	tty_flip_buffer_push(&port->state->port);
    350
    351	*status = lsr;
    352}
    353
    354static inline void check_modem_status(struct uart_port *port)
    355{
    356	uint8_t msr;
    357
    358	msr = siu_read(port, UART_MSR);
    359	if ((msr & UART_MSR_ANY_DELTA) == 0)
    360		return;
    361	if (msr & UART_MSR_DDCD)
    362		uart_handle_dcd_change(port, msr & UART_MSR_DCD);
    363	if (msr & UART_MSR_TERI)
    364		port->icount.rng++;
    365	if (msr & UART_MSR_DDSR)
    366		port->icount.dsr++;
    367	if (msr & UART_MSR_DCTS)
    368		uart_handle_cts_change(port, msr & UART_MSR_CTS);
    369
    370	wake_up_interruptible(&port->state->port.delta_msr_wait);
    371}
    372
    373static inline void transmit_chars(struct uart_port *port)
    374{
    375	struct circ_buf *xmit;
    376	int max_count = TX_MAX_COUNT;
    377
    378	xmit = &port->state->xmit;
    379
    380	if (port->x_char) {
    381		siu_write(port, UART_TX, port->x_char);
    382		port->icount.tx++;
    383		port->x_char = 0;
    384		return;
    385	}
    386
    387	if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
    388		siu_stop_tx(port);
    389		return;
    390	}
    391
    392	do {
    393		siu_write(port, UART_TX, xmit->buf[xmit->tail]);
    394		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
    395		port->icount.tx++;
    396		if (uart_circ_empty(xmit))
    397			break;
    398	} while (max_count-- > 0);
    399
    400	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
    401		uart_write_wakeup(port);
    402
    403	if (uart_circ_empty(xmit))
    404		siu_stop_tx(port);
    405}
    406
    407static irqreturn_t siu_interrupt(int irq, void *dev_id)
    408{
    409	struct uart_port *port;
    410	uint8_t iir, lsr;
    411
    412	port = (struct uart_port *)dev_id;
    413
    414	iir = siu_read(port, UART_IIR);
    415	if (iir & UART_IIR_NO_INT)
    416		return IRQ_NONE;
    417
    418	lsr = siu_read(port, UART_LSR);
    419	if (lsr & UART_LSR_DR)
    420		receive_chars(port, &lsr);
    421
    422	check_modem_status(port);
    423
    424	if (lsr & UART_LSR_THRE)
    425		transmit_chars(port);
    426
    427	return IRQ_HANDLED;
    428}
    429
    430static int siu_startup(struct uart_port *port)
    431{
    432	int retval;
    433
    434	if (port->membase == NULL)
    435		return -ENODEV;
    436
    437	siu_clear_fifo(port);
    438
    439	(void)siu_read(port, UART_LSR);
    440	(void)siu_read(port, UART_RX);
    441	(void)siu_read(port, UART_IIR);
    442	(void)siu_read(port, UART_MSR);
    443
    444	if (siu_read(port, UART_LSR) == 0xff)
    445		return -ENODEV;
    446
    447	retval = request_irq(port->irq, siu_interrupt, 0, siu_type_name(port), port);
    448	if (retval)
    449		return retval;
    450
    451	if (port->type == PORT_VR41XX_DSIU)
    452		vr41xx_enable_dsiuint(DSIUINT_ALL);
    453
    454	siu_write(port, UART_LCR, UART_LCR_WLEN8);
    455
    456	spin_lock_irq(&port->lock);
    457	siu_set_mctrl(port, port->mctrl);
    458	spin_unlock_irq(&port->lock);
    459
    460	siu_write(port, UART_IER, UART_IER_RLSI | UART_IER_RDI);
    461
    462	(void)siu_read(port, UART_LSR);
    463	(void)siu_read(port, UART_RX);
    464	(void)siu_read(port, UART_IIR);
    465	(void)siu_read(port, UART_MSR);
    466
    467	return 0;
    468}
    469
    470static void siu_shutdown(struct uart_port *port)
    471{
    472	unsigned long flags;
    473	uint8_t lcr;
    474
    475	siu_write(port, UART_IER, 0);
    476
    477	spin_lock_irqsave(&port->lock, flags);
    478
    479	port->mctrl &= ~TIOCM_OUT2;
    480	siu_set_mctrl(port, port->mctrl);
    481
    482	spin_unlock_irqrestore(&port->lock, flags);
    483
    484	lcr = siu_read(port, UART_LCR);
    485	lcr &= ~UART_LCR_SBC;
    486	siu_write(port, UART_LCR, lcr);
    487
    488	siu_clear_fifo(port);
    489
    490	(void)siu_read(port, UART_RX);
    491
    492	if (port->type == PORT_VR41XX_DSIU)
    493		vr41xx_disable_dsiuint(DSIUINT_ALL);
    494
    495	free_irq(port->irq, port);
    496}
    497
    498static void siu_set_termios(struct uart_port *port, struct ktermios *new,
    499                            struct ktermios *old)
    500{
    501	tcflag_t c_cflag, c_iflag;
    502	uint8_t lcr, fcr, ier;
    503	unsigned int baud, quot;
    504	unsigned long flags;
    505
    506	c_cflag = new->c_cflag;
    507	lcr = UART_LCR_WLEN(tty_get_char_size(c_cflag));
    508
    509	if (c_cflag & CSTOPB)
    510		lcr |= UART_LCR_STOP;
    511	if (c_cflag & PARENB)
    512		lcr |= UART_LCR_PARITY;
    513	if ((c_cflag & PARODD) != PARODD)
    514		lcr |= UART_LCR_EPAR;
    515	if (c_cflag & CMSPAR)
    516		lcr |= UART_LCR_SPAR;
    517
    518	baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
    519	quot = uart_get_divisor(port, baud);
    520
    521	fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10;
    522
    523	spin_lock_irqsave(&port->lock, flags);
    524
    525	uart_update_timeout(port, c_cflag, baud);
    526
    527	c_iflag = new->c_iflag;
    528
    529	port->read_status_mask = UART_LSR_THRE | UART_LSR_OE | UART_LSR_DR;
    530	if (c_iflag & INPCK)
    531		port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
    532	if (c_iflag & (IGNBRK | BRKINT | PARMRK))
    533		port->read_status_mask |= UART_LSR_BI;
    534
    535	port->ignore_status_mask = 0;
    536	if (c_iflag & IGNPAR)
    537		port->ignore_status_mask |= UART_LSR_FE | UART_LSR_PE;
    538	if (c_iflag & IGNBRK) {
    539		port->ignore_status_mask |= UART_LSR_BI;
    540		if (c_iflag & IGNPAR)
    541			port->ignore_status_mask |= UART_LSR_OE;
    542	}
    543
    544	if ((c_cflag & CREAD) == 0)
    545		port->ignore_status_mask |= UART_LSR_DR;
    546
    547	ier = siu_read(port, UART_IER);
    548	ier &= ~UART_IER_MSI;
    549	if (UART_ENABLE_MS(port, c_cflag))
    550		ier |= UART_IER_MSI;
    551	siu_write(port, UART_IER, ier);
    552
    553	siu_write(port, UART_LCR, lcr | UART_LCR_DLAB);
    554
    555	siu_write(port, UART_DLL, (uint8_t)quot);
    556	siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
    557
    558	siu_write(port, UART_LCR, lcr);
    559
    560	siu_write(port, UART_FCR, fcr);
    561
    562	siu_set_mctrl(port, port->mctrl);
    563
    564	spin_unlock_irqrestore(&port->lock, flags);
    565}
    566
    567static void siu_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
    568{
    569	switch (state) {
    570	case 0:
    571		switch (port->type) {
    572		case PORT_VR41XX_SIU:
    573			vr41xx_supply_clock(SIU_CLOCK);
    574			break;
    575		case PORT_VR41XX_DSIU:
    576			vr41xx_supply_clock(DSIU_CLOCK);
    577			break;
    578		}
    579		break;
    580	case 3:
    581		switch (port->type) {
    582		case PORT_VR41XX_SIU:
    583			vr41xx_mask_clock(SIU_CLOCK);
    584			break;
    585		case PORT_VR41XX_DSIU:
    586			vr41xx_mask_clock(DSIU_CLOCK);
    587			break;
    588		}
    589		break;
    590	}
    591}
    592
    593static const char *siu_type(struct uart_port *port)
    594{
    595	return siu_type_name(port);
    596}
    597
    598static void siu_release_port(struct uart_port *port)
    599{
    600	unsigned long size;
    601
    602	if (port->flags	& UPF_IOREMAP) {
    603		iounmap(port->membase);
    604		port->membase = NULL;
    605	}
    606
    607	size = siu_port_size(port);
    608	release_mem_region(port->mapbase, size);
    609}
    610
    611static int siu_request_port(struct uart_port *port)
    612{
    613	unsigned long size;
    614	struct resource *res;
    615
    616	size = siu_port_size(port);
    617	res = request_mem_region(port->mapbase, size, siu_type_name(port));
    618	if (res == NULL)
    619		return -EBUSY;
    620
    621	if (port->flags & UPF_IOREMAP) {
    622		port->membase = ioremap(port->mapbase, size);
    623		if (port->membase == NULL) {
    624			release_resource(res);
    625			return -ENOMEM;
    626		}
    627	}
    628
    629	return 0;
    630}
    631
    632static void siu_config_port(struct uart_port *port, int flags)
    633{
    634	if (flags & UART_CONFIG_TYPE) {
    635		port->type = siu_check_type(port);
    636		(void)siu_request_port(port);
    637	}
    638}
    639
    640static int siu_verify_port(struct uart_port *port, struct serial_struct *serial)
    641{
    642	if (port->type != PORT_VR41XX_SIU && port->type != PORT_VR41XX_DSIU)
    643		return -EINVAL;
    644	if (port->irq != serial->irq)
    645		return -EINVAL;
    646	if (port->iotype != serial->io_type)
    647		return -EINVAL;
    648	if (port->mapbase != (unsigned long)serial->iomem_base)
    649		return -EINVAL;
    650
    651	return 0;
    652}
    653
    654static const struct uart_ops siu_uart_ops = {
    655	.tx_empty	= siu_tx_empty,
    656	.set_mctrl	= siu_set_mctrl,
    657	.get_mctrl	= siu_get_mctrl,
    658	.stop_tx	= siu_stop_tx,
    659	.start_tx	= siu_start_tx,
    660	.stop_rx	= siu_stop_rx,
    661	.enable_ms	= siu_enable_ms,
    662	.break_ctl	= siu_break_ctl,
    663	.startup	= siu_startup,
    664	.shutdown	= siu_shutdown,
    665	.set_termios	= siu_set_termios,
    666	.pm		= siu_pm,
    667	.type		= siu_type,
    668	.release_port	= siu_release_port,
    669	.request_port	= siu_request_port,
    670	.config_port	= siu_config_port,
    671	.verify_port	= siu_verify_port,
    672};
    673
    674static int siu_init_ports(struct platform_device *pdev)
    675{
    676	struct uart_port *port;
    677	struct resource *res;
    678	int *type = dev_get_platdata(&pdev->dev);
    679	int i;
    680
    681	if (!type)
    682		return 0;
    683
    684	port = siu_uart_ports;
    685	for (i = 0; i < SIU_PORTS_MAX; i++) {
    686		port->type = type[i];
    687		if (port->type == PORT_UNKNOWN)
    688			continue;
    689		port->irq = platform_get_irq(pdev, i);
    690		port->uartclk = SIU_BAUD_BASE * 16;
    691		port->fifosize = 16;
    692		port->regshift = 0;
    693		port->iotype = UPIO_MEM;
    694		port->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
    695		port->line = i;
    696		res = platform_get_resource(pdev, IORESOURCE_MEM, i);
    697		port->mapbase = res->start;
    698		port++;
    699	}
    700
    701	return i;
    702}
    703
    704#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
    705
    706#define BOTH_EMPTY	(UART_LSR_TEMT | UART_LSR_THRE)
    707
    708static void wait_for_xmitr(struct uart_port *port)
    709{
    710	int timeout = 10000;
    711	uint8_t lsr, msr;
    712
    713	do {
    714		lsr = siu_read(port, UART_LSR);
    715		if (lsr & UART_LSR_BI)
    716			lsr_break_flag[port->line] = UART_LSR_BI;
    717
    718		if ((lsr & BOTH_EMPTY) == BOTH_EMPTY)
    719			break;
    720	} while (timeout-- > 0);
    721
    722	if (port->flags & UPF_CONS_FLOW) {
    723		timeout = 1000000;
    724
    725		do {
    726			msr = siu_read(port, UART_MSR);
    727			if ((msr & UART_MSR_CTS) != 0)
    728				break;
    729		} while (timeout-- > 0);
    730	}
    731}
    732
    733static void siu_console_putchar(struct uart_port *port, unsigned char ch)
    734{
    735	wait_for_xmitr(port);
    736	siu_write(port, UART_TX, ch);
    737}
    738
    739static void siu_console_write(struct console *con, const char *s, unsigned count)
    740{
    741	struct uart_port *port;
    742	uint8_t ier;
    743
    744	port = &siu_uart_ports[con->index];
    745
    746	ier = siu_read(port, UART_IER);
    747	siu_write(port, UART_IER, 0);
    748
    749	uart_console_write(port, s, count, siu_console_putchar);
    750
    751	wait_for_xmitr(port);
    752	siu_write(port, UART_IER, ier);
    753}
    754
    755static int __init siu_console_setup(struct console *con, char *options)
    756{
    757	struct uart_port *port;
    758	int baud = 9600;
    759	int parity = 'n';
    760	int bits = 8;
    761	int flow = 'n';
    762
    763	if (con->index >= SIU_PORTS_MAX)
    764		con->index = 0;
    765
    766	port = &siu_uart_ports[con->index];
    767	if (port->membase == NULL) {
    768		if (port->mapbase == 0)
    769			return -ENODEV;
    770		port->membase = ioremap(port->mapbase, siu_port_size(port));
    771	}
    772
    773	if (port->type == PORT_VR41XX_SIU)
    774		vr41xx_select_siu_interface(SIU_INTERFACE_RS232C);
    775
    776	if (options != NULL)
    777		uart_parse_options(options, &baud, &parity, &bits, &flow);
    778
    779	return uart_set_options(port, con, baud, parity, bits, flow);
    780}
    781
    782static struct uart_driver siu_uart_driver;
    783
    784static struct console siu_console = {
    785	.name	= "ttyVR",
    786	.write	= siu_console_write,
    787	.device	= uart_console_device,
    788	.setup	= siu_console_setup,
    789	.flags	= CON_PRINTBUFFER,
    790	.index	= -1,
    791	.data	= &siu_uart_driver,
    792};
    793
    794static int siu_console_init(void)
    795{
    796	struct uart_port *port;
    797	int i;
    798
    799	for (i = 0; i < SIU_PORTS_MAX; i++) {
    800		port = &siu_uart_ports[i];
    801		port->ops = &siu_uart_ops;
    802	}
    803
    804	register_console(&siu_console);
    805
    806	return 0;
    807}
    808
    809console_initcall(siu_console_init);
    810
    811void __init vr41xx_siu_early_setup(struct uart_port *port)
    812{
    813	if (port->type == PORT_UNKNOWN)
    814		return;
    815
    816	siu_uart_ports[port->line].line = port->line;
    817	siu_uart_ports[port->line].type = port->type;
    818	siu_uart_ports[port->line].uartclk = SIU_BAUD_BASE * 16;
    819	siu_uart_ports[port->line].mapbase = port->mapbase;
    820	siu_uart_ports[port->line].ops = &siu_uart_ops;
    821}
    822
    823#define SERIAL_VR41XX_CONSOLE	&siu_console
    824#else
    825#define SERIAL_VR41XX_CONSOLE	NULL
    826#endif
    827
    828static struct uart_driver siu_uart_driver = {
    829	.owner		= THIS_MODULE,
    830	.driver_name	= "SIU",
    831	.dev_name	= "ttyVR",
    832	.major		= SIU_MAJOR,
    833	.minor		= SIU_MINOR_BASE,
    834	.cons		= SERIAL_VR41XX_CONSOLE,
    835};
    836
    837static int siu_probe(struct platform_device *dev)
    838{
    839	struct uart_port *port;
    840	int num, i, retval;
    841
    842	num = siu_init_ports(dev);
    843	if (num <= 0)
    844		return -ENODEV;
    845
    846	siu_uart_driver.nr = num;
    847	retval = uart_register_driver(&siu_uart_driver);
    848	if (retval)
    849		return retval;
    850
    851	for (i = 0; i < num; i++) {
    852		port = &siu_uart_ports[i];
    853		port->ops = &siu_uart_ops;
    854		port->dev = &dev->dev;
    855		port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_VR41XX_CONSOLE);
    856
    857		retval = uart_add_one_port(&siu_uart_driver, port);
    858		if (retval < 0) {
    859			port->dev = NULL;
    860			break;
    861		}
    862	}
    863
    864	if (i == 0 && retval < 0) {
    865		uart_unregister_driver(&siu_uart_driver);
    866		return retval;
    867	}
    868
    869	return 0;
    870}
    871
    872static int siu_remove(struct platform_device *dev)
    873{
    874	struct uart_port *port;
    875	int i;
    876
    877	for (i = 0; i < siu_uart_driver.nr; i++) {
    878		port = &siu_uart_ports[i];
    879		if (port->dev == &dev->dev) {
    880			uart_remove_one_port(&siu_uart_driver, port);
    881			port->dev = NULL;
    882		}
    883	}
    884
    885	uart_unregister_driver(&siu_uart_driver);
    886
    887	return 0;
    888}
    889
    890static int siu_suspend(struct platform_device *dev, pm_message_t state)
    891{
    892	struct uart_port *port;
    893	int i;
    894
    895	for (i = 0; i < siu_uart_driver.nr; i++) {
    896		port = &siu_uart_ports[i];
    897		if ((port->type == PORT_VR41XX_SIU ||
    898		     port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
    899			uart_suspend_port(&siu_uart_driver, port);
    900
    901	}
    902
    903	return 0;
    904}
    905
    906static int siu_resume(struct platform_device *dev)
    907{
    908	struct uart_port *port;
    909	int i;
    910
    911	for (i = 0; i < siu_uart_driver.nr; i++) {
    912		port = &siu_uart_ports[i];
    913		if ((port->type == PORT_VR41XX_SIU ||
    914		     port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
    915			uart_resume_port(&siu_uart_driver, port);
    916	}
    917
    918	return 0;
    919}
    920
    921static struct platform_driver siu_device_driver = {
    922	.probe		= siu_probe,
    923	.remove		= siu_remove,
    924	.suspend	= siu_suspend,
    925	.resume		= siu_resume,
    926	.driver		= {
    927		.name	= "SIU",
    928	},
    929};
    930
    931module_platform_driver(siu_device_driver);
    932
    933MODULE_LICENSE("GPL");
    934MODULE_ALIAS("platform:SIU");