cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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uio_aec.c (3488B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * uio_aec.c -- simple driver for Adrienne Electronics Corp time code PCI device
      4 *
      5 * Copyright (C) 2008 Brandon Philips <brandon@ifup.org>
      6 */
      7
      8#include <linux/kernel.h>
      9#include <linux/module.h>
     10#include <linux/pci.h>
     11#include <linux/init.h>
     12#include <linux/interrupt.h>
     13#include <linux/cdev.h>
     14#include <linux/fs.h>
     15#include <linux/io.h>
     16#include <linux/uaccess.h>
     17#include <linux/uio_driver.h>
     18#include <linux/slab.h>
     19
     20#define PCI_VENDOR_ID_AEC 0xaecb
     21#define PCI_DEVICE_ID_AEC_VITCLTC 0x6250
     22
     23#define INT_ENABLE_ADDR		0xFC
     24#define INT_ENABLE		0x10
     25#define INT_DISABLE		0x0
     26
     27#define INT_MASK_ADDR		0x2E
     28#define INT_MASK_ALL		0x3F
     29
     30#define INTA_DRVR_ADDR		0xFE
     31#define INTA_ENABLED_FLAG	0x08
     32#define INTA_FLAG		0x01
     33
     34#define MAILBOX			0x0F
     35
     36static struct pci_device_id ids[] = {
     37	{ PCI_DEVICE(PCI_VENDOR_ID_AEC, PCI_DEVICE_ID_AEC_VITCLTC), },
     38	{ 0, }
     39};
     40MODULE_DEVICE_TABLE(pci, ids);
     41
     42static irqreturn_t aectc_irq(int irq, struct uio_info *dev_info)
     43{
     44	void __iomem *int_flag = dev_info->priv + INTA_DRVR_ADDR;
     45	unsigned char status = ioread8(int_flag);
     46
     47
     48	if ((status & INTA_ENABLED_FLAG) && (status & INTA_FLAG)) {
     49		/* application writes 0x00 to 0x2F to get next interrupt */
     50		status = ioread8(dev_info->priv + MAILBOX);
     51		return IRQ_HANDLED;
     52	}
     53
     54	return IRQ_NONE;
     55}
     56
     57static void print_board_data(struct pci_dev *pdev, struct uio_info *i)
     58{
     59	dev_info(&pdev->dev, "PCI-TC board vendor: %x%x number: %x%x"
     60		" revision: %c%c\n",
     61		ioread8(i->priv + 0x01),
     62		ioread8(i->priv + 0x00),
     63		ioread8(i->priv + 0x03),
     64		ioread8(i->priv + 0x02),
     65		ioread8(i->priv + 0x06),
     66		ioread8(i->priv + 0x07));
     67}
     68
     69static int probe(struct pci_dev *pdev, const struct pci_device_id *id)
     70{
     71	struct uio_info *info;
     72	int ret;
     73
     74	info = devm_kzalloc(&pdev->dev, sizeof(struct uio_info), GFP_KERNEL);
     75	if (!info)
     76		return -ENOMEM;
     77
     78	if (pci_enable_device(pdev))
     79		return -ENODEV;
     80
     81	if (pci_request_regions(pdev, "aectc"))
     82		goto out_disable;
     83
     84	info->name = "aectc";
     85	info->port[0].start = pci_resource_start(pdev, 0);
     86	if (!info->port[0].start)
     87		goto out_release;
     88	info->priv = pci_iomap(pdev, 0, 0);
     89	if (!info->priv)
     90		goto out_release;
     91	info->port[0].size = pci_resource_len(pdev, 0);
     92	info->port[0].porttype = UIO_PORT_GPIO;
     93
     94	info->version = "0.0.1";
     95	info->irq = pdev->irq;
     96	info->irq_flags = IRQF_SHARED;
     97	info->handler = aectc_irq;
     98
     99	print_board_data(pdev, info);
    100	ret = uio_register_device(&pdev->dev, info);
    101	if (ret)
    102		goto out_unmap;
    103
    104	iowrite32(INT_ENABLE, info->priv + INT_ENABLE_ADDR);
    105	iowrite8(INT_MASK_ALL, info->priv + INT_MASK_ADDR);
    106	if (!(ioread8(info->priv + INTA_DRVR_ADDR)
    107			& INTA_ENABLED_FLAG))
    108		dev_err(&pdev->dev, "aectc: interrupts not enabled\n");
    109
    110	pci_set_drvdata(pdev, info);
    111
    112	return 0;
    113
    114out_unmap:
    115	pci_iounmap(pdev, info->priv);
    116out_release:
    117	pci_release_regions(pdev);
    118out_disable:
    119	pci_disable_device(pdev);
    120	return -ENODEV;
    121}
    122
    123static void remove(struct pci_dev *pdev)
    124{
    125	struct uio_info *info = pci_get_drvdata(pdev);
    126
    127	/* disable interrupts */
    128	iowrite8(INT_DISABLE, info->priv + INT_MASK_ADDR);
    129	iowrite32(INT_DISABLE, info->priv + INT_ENABLE_ADDR);
    130	/* read mailbox to ensure board drops irq */
    131	ioread8(info->priv + MAILBOX);
    132
    133	uio_unregister_device(info);
    134	pci_release_regions(pdev);
    135	pci_disable_device(pdev);
    136	pci_iounmap(pdev, info->priv);
    137}
    138
    139static struct pci_driver pci_driver = {
    140	.name = "aectc",
    141	.id_table = ids,
    142	.probe = probe,
    143	.remove = remove,
    144};
    145
    146module_pci_driver(pci_driver);
    147MODULE_LICENSE("GPL");