cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

Kconfig (5135B)


      1# SPDX-License-Identifier: GPL-2.0
      2
      3config USB_DWC3
      4	tristate "DesignWare USB3 DRD Core Support"
      5	depends on (USB || USB_GADGET) && HAS_DMA
      6	select USB_XHCI_PLATFORM if USB_XHCI_HCD
      7	select USB_ROLE_SWITCH if USB_DWC3_DUAL_ROLE
      8	help
      9	  Say Y or M here if your system has a Dual Role SuperSpeed
     10	  USB controller based on the DesignWare USB3 IP Core.
     11
     12	  If you choose to build this driver is a dynamically linked
     13	  module, the module will be called dwc3.ko.
     14
     15if USB_DWC3
     16
     17config USB_DWC3_ULPI
     18	bool "Register ULPI PHY Interface"
     19	depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_DWC3
     20	help
     21	  Select this if you have ULPI type PHY attached to your DWC3
     22	  controller.
     23
     24choice
     25	bool "DWC3 Mode Selection"
     26	default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
     27	default USB_DWC3_HOST if (USB && !USB_GADGET)
     28	default USB_DWC3_GADGET if (!USB && USB_GADGET)
     29
     30config USB_DWC3_HOST
     31	bool "Host only mode"
     32	depends on USB=y || USB=USB_DWC3
     33	help
     34	  Select this when you want to use DWC3 in host mode only,
     35	  thereby the gadget feature will be regressed.
     36
     37config USB_DWC3_GADGET
     38	bool "Gadget only mode"
     39	depends on USB_GADGET=y || USB_GADGET=USB_DWC3
     40	help
     41	  Select this when you want to use DWC3 in gadget mode only,
     42	  thereby the host feature will be regressed.
     43
     44config USB_DWC3_DUAL_ROLE
     45	bool "Dual Role mode"
     46	depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
     47	depends on (EXTCON=y || EXTCON=USB_DWC3)
     48	help
     49	  This is the default mode of working of DWC3 controller where
     50	  both host and gadget features are enabled.
     51
     52endchoice
     53
     54comment "Platform Glue Driver Support"
     55
     56config USB_DWC3_OMAP
     57	tristate "Texas Instruments OMAP5 and similar Platforms"
     58	depends on ARCH_OMAP2PLUS || COMPILE_TEST
     59	depends on EXTCON || !EXTCON
     60	depends on OF
     61	default USB_DWC3
     62	help
     63	  Some platforms from Texas Instruments like OMAP5, DRA7xxx and
     64	  AM437x use this IP for USB2/3 functionality.
     65
     66	  Say 'Y' or 'M' here if you have one such device
     67
     68config USB_DWC3_EXYNOS
     69	tristate "Samsung Exynos SoC Platform"
     70	depends on (ARCH_EXYNOS || COMPILE_TEST) && OF
     71	default USB_DWC3
     72	help
     73	  Recent Samsung Exynos SoCs (Exynos5250, Exynos5410, Exynos542x,
     74	  Exynos5800, Exynos5433, Exynos7) ship with one DesignWare Core USB3
     75	  IP inside, say 'Y' or 'M' if you have one such device.
     76
     77config USB_DWC3_PCI
     78	tristate "PCIe-based Platforms"
     79	depends on USB_PCI && ACPI
     80	default USB_DWC3
     81	help
     82	  If you're using the DesignWare Core IP with a PCIe (but not HAPS
     83	  platform), please say 'Y' or 'M' here.
     84
     85config USB_DWC3_HAPS
     86	tristate "Synopsys PCIe-based HAPS Platforms"
     87	depends on USB_PCI
     88	default USB_DWC3
     89	help
     90	  If you're using the DesignWare Core IP with a Synopsys PCIe HAPS
     91	  platform, please say 'Y' or 'M' here.
     92
     93config USB_DWC3_KEYSTONE
     94	tristate "Texas Instruments Keystone2/AM654 Platforms"
     95	depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
     96	default USB_DWC3
     97	help
     98	  Support of USB2/3 functionality in TI Keystone2 and AM654 platforms.
     99	  Say 'Y' or 'M' here if you have one such device
    100
    101config USB_DWC3_MESON_G12A
    102	tristate "Amlogic Meson G12A Platforms"
    103	depends on OF && COMMON_CLK
    104	depends on ARCH_MESON || COMPILE_TEST
    105	default USB_DWC3
    106	select USB_ROLE_SWITCH
    107	select REGMAP_MMIO
    108	help
    109	  Support USB2/3 functionality in Amlogic G12A platforms.
    110	  Say 'Y' or 'M' if you have one such device.
    111
    112config USB_DWC3_OF_SIMPLE
    113	tristate "Generic OF Simple Glue Layer"
    114	depends on OF && COMMON_CLK
    115	default USB_DWC3
    116	help
    117	  Support USB2/3 functionality in simple SoC integrations.
    118	  Currently supports Xilinx and Qualcomm DWC USB3 IP.
    119	  Say 'Y' or 'M' if you have one such device.
    120
    121config USB_DWC3_ST
    122	tristate "STMicroelectronics Platforms"
    123	depends on (ARCH_STI || COMPILE_TEST) && OF
    124	default USB_DWC3
    125	help
    126	  STMicroelectronics SoCs with one DesignWare Core USB3 IP
    127	  inside (i.e. STiH407).
    128	  Say 'Y' or 'M' if you have one such device.
    129
    130config USB_DWC3_QCOM
    131	tristate "Qualcomm Platform"
    132	depends on ARCH_QCOM || COMPILE_TEST
    133	depends on EXTCON || !EXTCON
    134	depends on (OF || ACPI)
    135	default USB_DWC3
    136	help
    137	  Some Qualcomm SoCs use DesignWare Core IP for USB2/3
    138	  functionality.
    139	  This driver also handles Qscratch wrapper which is needed
    140	  for peripheral mode support.
    141	  Say 'Y' or 'M' if you have one such device.
    142
    143config USB_DWC3_IMX8MP
    144	tristate "NXP iMX8MP Platform"
    145	depends on OF && COMMON_CLK
    146	depends on (ARCH_MXC && ARM64) || COMPILE_TEST
    147	default USB_DWC3
    148	help
    149	  NXP iMX8M Plus SoC use DesignWare Core IP for USB2/3
    150	  functionality.
    151	  Say 'Y' or 'M' if you have one such device.
    152
    153config USB_DWC3_XILINX
    154	tristate "Xilinx Platforms"
    155	depends on (ARCH_ZYNQMP || ARCH_VERSAL) && OF
    156	default USB_DWC3
    157	help
    158	  Support Xilinx SoCs with DesignWare Core USB3 IP.
    159	  This driver handles both ZynqMP and Versal SoC operations.
    160	  Say 'Y' or 'M' if you have one such device.
    161
    162config USB_DWC3_AM62
    163	tristate "Texas Instruments AM62 Platforms"
    164	depends on ARCH_K3 || COMPILE_TEST
    165	default USB_DWC3
    166	help
    167	  Support TI's AM62 platforms with DesignWare Core USB3 IP.
    168	  The Designware Core USB3 IP is progammed to operate in
    169	  in USB 2.0 mode only.
    170	  Say 'Y' or 'M' here if you have one such device
    171endif