cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ehci-orion.c (9245B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * drivers/usb/host/ehci-orion.c
      4 *
      5 * Tzachi Perelstein <tzachi@marvell.com>
      6 */
      7
      8#include <linux/kernel.h>
      9#include <linux/module.h>
     10#include <linux/platform_device.h>
     11#include <linux/mbus.h>
     12#include <linux/clk.h>
     13#include <linux/platform_data/usb-ehci-orion.h>
     14#include <linux/of.h>
     15#include <linux/phy/phy.h>
     16#include <linux/of_device.h>
     17#include <linux/of_irq.h>
     18#include <linux/usb.h>
     19#include <linux/usb/hcd.h>
     20#include <linux/io.h>
     21#include <linux/dma-mapping.h>
     22
     23#include "ehci.h"
     24
     25#define rdl(off)	readl_relaxed(hcd->regs + (off))
     26#define wrl(off, val)	writel_relaxed((val), hcd->regs + (off))
     27
     28#define USB_CMD			0x140
     29#define   USB_CMD_RUN		BIT(0)
     30#define   USB_CMD_RESET		BIT(1)
     31#define USB_MODE		0x1a8
     32#define   USB_MODE_MASK		GENMASK(1, 0)
     33#define   USB_MODE_DEVICE	0x2
     34#define   USB_MODE_HOST		0x3
     35#define   USB_MODE_SDIS		BIT(4)
     36#define USB_CAUSE		0x310
     37#define USB_MASK		0x314
     38#define USB_WINDOW_CTRL(i)	(0x320 + ((i) << 4))
     39#define USB_WINDOW_BASE(i)	(0x324 + ((i) << 4))
     40#define USB_IPG			0x360
     41#define USB_PHY_PWR_CTRL	0x400
     42#define USB_PHY_TX_CTRL		0x420
     43#define USB_PHY_RX_CTRL		0x430
     44#define USB_PHY_IVREF_CTRL	0x440
     45#define USB_PHY_TST_GRP_CTRL	0x450
     46
     47#define USB_SBUSCFG		0x90
     48
     49/* BAWR = BARD = 3 : Align read/write bursts packets larger than 128 bytes */
     50#define USB_SBUSCFG_BAWR_ALIGN_128B	(0x3 << 6)
     51#define USB_SBUSCFG_BARD_ALIGN_128B	(0x3 << 3)
     52/* AHBBRST = 3	   : Align AHB Burst to INCR16 (64 bytes) */
     53#define USB_SBUSCFG_AHBBRST_INCR16	(0x3 << 0)
     54
     55#define USB_SBUSCFG_DEF_VAL (USB_SBUSCFG_BAWR_ALIGN_128B	\
     56			     | USB_SBUSCFG_BARD_ALIGN_128B	\
     57			     | USB_SBUSCFG_AHBBRST_INCR16)
     58
     59#define DRIVER_DESC "EHCI orion driver"
     60
     61#define hcd_to_orion_priv(h) ((struct orion_ehci_hcd *)hcd_to_ehci(h)->priv)
     62
     63struct orion_ehci_hcd {
     64	struct clk *clk;
     65	struct phy *phy;
     66};
     67
     68static const char hcd_name[] = "ehci-orion";
     69
     70static struct hc_driver __read_mostly ehci_orion_hc_driver;
     71
     72/*
     73 * Implement Orion USB controller specification guidelines
     74 */
     75static void orion_usb_phy_v1_setup(struct usb_hcd *hcd)
     76{
     77	/* The below GLs are according to the Orion Errata document */
     78	/*
     79	 * Clear interrupt cause and mask
     80	 */
     81	wrl(USB_CAUSE, 0);
     82	wrl(USB_MASK, 0);
     83
     84	/*
     85	 * Reset controller
     86	 */
     87	wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET);
     88	while (rdl(USB_CMD) & USB_CMD_RESET);
     89
     90	/*
     91	 * GL# USB-10: Set IPG for non start of frame packets
     92	 * Bits[14:8]=0xc
     93	 */
     94	wrl(USB_IPG, (rdl(USB_IPG) & ~0x7f00) | 0xc00);
     95
     96	/*
     97	 * GL# USB-9: USB 2.0 Power Control
     98	 * BG_VSEL[7:6]=0x1
     99	 */
    100	wrl(USB_PHY_PWR_CTRL, (rdl(USB_PHY_PWR_CTRL) & ~0xc0)| 0x40);
    101
    102	/*
    103	 * GL# USB-1: USB PHY Tx Control - force calibration to '8'
    104	 * TXDATA_BLOCK_EN[21]=0x1, EXT_RCAL_EN[13]=0x1, IMP_CAL[6:3]=0x8
    105	 */
    106	wrl(USB_PHY_TX_CTRL, (rdl(USB_PHY_TX_CTRL) & ~0x78) | 0x202040);
    107
    108	/*
    109	 * GL# USB-3 GL# USB-9: USB PHY Rx Control
    110	 * RXDATA_BLOCK_LENGHT[31:30]=0x3, EDGE_DET_SEL[27:26]=0,
    111	 * CDR_FASTLOCK_EN[21]=0, DISCON_THRESHOLD[9:8]=0, SQ_THRESH[7:4]=0x1
    112	 */
    113	wrl(USB_PHY_RX_CTRL, (rdl(USB_PHY_RX_CTRL) & ~0xc2003f0) | 0xc0000010);
    114
    115	/*
    116	 * GL# USB-3 GL# USB-9: USB PHY IVREF Control
    117	 * PLLVDD12[1:0]=0x2, RXVDD[5:4]=0x3, Reserved[19]=0
    118	 */
    119	wrl(USB_PHY_IVREF_CTRL, (rdl(USB_PHY_IVREF_CTRL) & ~0x80003 ) | 0x32);
    120
    121	/*
    122	 * GL# USB-3 GL# USB-9: USB PHY Test Group Control
    123	 * REG_FIFO_SQ_RST[15]=0
    124	 */
    125	wrl(USB_PHY_TST_GRP_CTRL, rdl(USB_PHY_TST_GRP_CTRL) & ~0x8000);
    126
    127	/*
    128	 * Stop and reset controller
    129	 */
    130	wrl(USB_CMD, rdl(USB_CMD) & ~USB_CMD_RUN);
    131	wrl(USB_CMD, rdl(USB_CMD) | USB_CMD_RESET);
    132	while (rdl(USB_CMD) & USB_CMD_RESET);
    133
    134	/*
    135	 * GL# USB-5 Streaming disable REG_USB_MODE[4]=1
    136	 * TBD: This need to be done after each reset!
    137	 * GL# USB-4 Setup USB Host mode
    138	 */
    139	wrl(USB_MODE, USB_MODE_SDIS | USB_MODE_HOST);
    140}
    141
    142static void
    143ehci_orion_conf_mbus_windows(struct usb_hcd *hcd,
    144			     const struct mbus_dram_target_info *dram)
    145{
    146	int i;
    147
    148	for (i = 0; i < 4; i++) {
    149		wrl(USB_WINDOW_CTRL(i), 0);
    150		wrl(USB_WINDOW_BASE(i), 0);
    151	}
    152
    153	for (i = 0; i < dram->num_cs; i++) {
    154		const struct mbus_dram_window *cs = dram->cs + i;
    155
    156		wrl(USB_WINDOW_CTRL(i), ((cs->size - 1) & 0xffff0000) |
    157					(cs->mbus_attr << 8) |
    158					(dram->mbus_dram_target_id << 4) | 1);
    159		wrl(USB_WINDOW_BASE(i), cs->base);
    160	}
    161}
    162
    163static int ehci_orion_drv_reset(struct usb_hcd *hcd)
    164{
    165	struct device *dev = hcd->self.controller;
    166	int ret;
    167
    168	ret = ehci_setup(hcd);
    169	if (ret)
    170		return ret;
    171
    172	/*
    173	 * For SoC without hlock, need to program sbuscfg value to guarantee
    174	 * AHB master's burst would not overrun or underrun FIFO.
    175	 *
    176	 * sbuscfg reg has to be set after usb controller reset, otherwise
    177	 * the value would be override to 0.
    178	 */
    179	if (of_device_is_compatible(dev->of_node, "marvell,armada-3700-ehci"))
    180		wrl(USB_SBUSCFG, USB_SBUSCFG_DEF_VAL);
    181
    182	return ret;
    183}
    184
    185static int __maybe_unused ehci_orion_drv_suspend(struct device *dev)
    186{
    187	struct usb_hcd *hcd = dev_get_drvdata(dev);
    188
    189	return ehci_suspend(hcd, device_may_wakeup(dev));
    190}
    191
    192static int __maybe_unused ehci_orion_drv_resume(struct device *dev)
    193{
    194	struct usb_hcd *hcd = dev_get_drvdata(dev);
    195
    196	return ehci_resume(hcd, false);
    197}
    198
    199static SIMPLE_DEV_PM_OPS(ehci_orion_pm_ops, ehci_orion_drv_suspend,
    200			 ehci_orion_drv_resume);
    201
    202static const struct ehci_driver_overrides orion_overrides __initconst = {
    203	.extra_priv_size =	sizeof(struct orion_ehci_hcd),
    204	.reset = ehci_orion_drv_reset,
    205};
    206
    207static int ehci_orion_drv_probe(struct platform_device *pdev)
    208{
    209	struct orion_ehci_data *pd = dev_get_platdata(&pdev->dev);
    210	const struct mbus_dram_target_info *dram;
    211	struct resource *res;
    212	struct usb_hcd *hcd;
    213	struct ehci_hcd *ehci;
    214	void __iomem *regs;
    215	int irq, err;
    216	enum orion_ehci_phy_ver phy_version;
    217	struct orion_ehci_hcd *priv;
    218
    219	if (usb_disabled())
    220		return -ENODEV;
    221
    222	pr_debug("Initializing Orion-SoC USB Host Controller\n");
    223
    224	irq = platform_get_irq(pdev, 0);
    225	if (irq <= 0) {
    226		err = -ENODEV;
    227		goto err;
    228	}
    229
    230	/*
    231	 * Right now device-tree probed devices don't get dma_mask
    232	 * set. Since shared usb code relies on it, set it here for
    233	 * now. Once we have dma capability bindings this can go away.
    234	 */
    235	err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
    236	if (err)
    237		goto err;
    238
    239	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
    240	regs = devm_ioremap_resource(&pdev->dev, res);
    241	if (IS_ERR(regs)) {
    242		err = PTR_ERR(regs);
    243		goto err;
    244	}
    245
    246	hcd = usb_create_hcd(&ehci_orion_hc_driver,
    247			&pdev->dev, dev_name(&pdev->dev));
    248	if (!hcd) {
    249		err = -ENOMEM;
    250		goto err;
    251	}
    252
    253	hcd->rsrc_start = res->start;
    254	hcd->rsrc_len = resource_size(res);
    255	hcd->regs = regs;
    256
    257	ehci = hcd_to_ehci(hcd);
    258	ehci->caps = hcd->regs + 0x100;
    259	hcd->has_tt = 1;
    260
    261	priv = hcd_to_orion_priv(hcd);
    262	/*
    263	 * Not all platforms can gate the clock, so it is not an error if
    264	 * the clock does not exists.
    265	 */
    266	priv->clk = devm_clk_get(&pdev->dev, NULL);
    267	if (!IS_ERR(priv->clk)) {
    268		err = clk_prepare_enable(priv->clk);
    269		if (err)
    270			goto err_put_hcd;
    271	}
    272
    273	priv->phy = devm_phy_optional_get(&pdev->dev, "usb");
    274	if (IS_ERR(priv->phy)) {
    275		err = PTR_ERR(priv->phy);
    276		if (err != -ENOSYS)
    277			goto err_dis_clk;
    278	}
    279
    280	/*
    281	 * (Re-)program MBUS remapping windows if we are asked to.
    282	 */
    283	dram = mv_mbus_dram_info();
    284	if (dram)
    285		ehci_orion_conf_mbus_windows(hcd, dram);
    286
    287	/*
    288	 * setup Orion USB controller.
    289	 */
    290	if (pdev->dev.of_node)
    291		phy_version = EHCI_PHY_NA;
    292	else
    293		phy_version = pd->phy_version;
    294
    295	switch (phy_version) {
    296	case EHCI_PHY_NA:	/* dont change USB phy settings */
    297		break;
    298	case EHCI_PHY_ORION:
    299		orion_usb_phy_v1_setup(hcd);
    300		break;
    301	case EHCI_PHY_DD:
    302	case EHCI_PHY_KW:
    303	default:
    304		dev_warn(&pdev->dev, "USB phy version isn't supported.\n");
    305	}
    306
    307	err = usb_add_hcd(hcd, irq, IRQF_SHARED);
    308	if (err)
    309		goto err_dis_clk;
    310
    311	device_wakeup_enable(hcd->self.controller);
    312	return 0;
    313
    314err_dis_clk:
    315	if (!IS_ERR(priv->clk))
    316		clk_disable_unprepare(priv->clk);
    317err_put_hcd:
    318	usb_put_hcd(hcd);
    319err:
    320	dev_err(&pdev->dev, "init %s fail, %d\n",
    321		dev_name(&pdev->dev), err);
    322
    323	return err;
    324}
    325
    326static int ehci_orion_drv_remove(struct platform_device *pdev)
    327{
    328	struct usb_hcd *hcd = platform_get_drvdata(pdev);
    329	struct orion_ehci_hcd *priv = hcd_to_orion_priv(hcd);
    330
    331	usb_remove_hcd(hcd);
    332
    333	if (!IS_ERR(priv->clk))
    334		clk_disable_unprepare(priv->clk);
    335
    336	usb_put_hcd(hcd);
    337
    338	return 0;
    339}
    340
    341static const struct of_device_id ehci_orion_dt_ids[] = {
    342	{ .compatible = "marvell,orion-ehci", },
    343	{ .compatible = "marvell,armada-3700-ehci", },
    344	{},
    345};
    346MODULE_DEVICE_TABLE(of, ehci_orion_dt_ids);
    347
    348static struct platform_driver ehci_orion_driver = {
    349	.probe		= ehci_orion_drv_probe,
    350	.remove		= ehci_orion_drv_remove,
    351	.shutdown	= usb_hcd_platform_shutdown,
    352	.driver = {
    353		.name	= "orion-ehci",
    354		.of_match_table = ehci_orion_dt_ids,
    355		.pm = &ehci_orion_pm_ops,
    356	},
    357};
    358
    359static int __init ehci_orion_init(void)
    360{
    361	if (usb_disabled())
    362		return -ENODEV;
    363
    364	pr_info("%s: " DRIVER_DESC "\n", hcd_name);
    365
    366	ehci_init_driver(&ehci_orion_hc_driver, &orion_overrides);
    367	return platform_driver_register(&ehci_orion_driver);
    368}
    369module_init(ehci_orion_init);
    370
    371static void __exit ehci_orion_cleanup(void)
    372{
    373	platform_driver_unregister(&ehci_orion_driver);
    374}
    375module_exit(ehci_orion_cleanup);
    376
    377MODULE_DESCRIPTION(DRIVER_DESC);
    378MODULE_ALIAS("platform:orion-ehci");
    379MODULE_AUTHOR("Tzachi Perelstein");
    380MODULE_LICENSE("GPL v2");