cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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xhci-rcar.h (1663B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * drivers/usb/host/xhci-rcar.h
      4 *
      5 * Copyright (C) 2014 Renesas Electronics Corporation
      6 */
      7
      8#ifndef _XHCI_RCAR_H
      9#define _XHCI_RCAR_H
     10
     11#define XHCI_RCAR_FIRMWARE_NAME_V1	"r8a779x_usb3_v1.dlmem"
     12#define XHCI_RCAR_FIRMWARE_NAME_V2	"r8a779x_usb3_v2.dlmem"
     13#define XHCI_RCAR_FIRMWARE_NAME_V3	"r8a779x_usb3_v3.dlmem"
     14
     15#if IS_ENABLED(CONFIG_USB_XHCI_RCAR)
     16void xhci_rcar_start(struct usb_hcd *hcd);
     17int xhci_rcar_init_quirk(struct usb_hcd *hcd);
     18int xhci_rcar_resume_quirk(struct usb_hcd *hcd);
     19#else
     20static inline void xhci_rcar_start(struct usb_hcd *hcd)
     21{
     22}
     23
     24static inline int xhci_rcar_init_quirk(struct usb_hcd *hcd)
     25{
     26	return 0;
     27}
     28
     29static inline int xhci_rcar_resume_quirk(struct usb_hcd *hcd)
     30{
     31	return 0;
     32}
     33#endif
     34
     35/*
     36 * On R-Car Gen2 and Gen3, the AC64 bit (bit 0) of HCCPARAMS1 is set
     37 * to 1. However, these SoCs don't support 64-bit address memory
     38 * pointers. So, this driver clears the AC64 bit of xhci->hcc_params
     39 * to call dma_set_coherent_mask(dev, DMA_BIT_MASK(32)) in
     40 * xhci_gen_setup() by using the XHCI_NO_64BIT_SUPPORT quirk.
     41 *
     42 * And, since the firmware/internal CPU control the USBSTS.STS_HALT
     43 * and the process speed is down when the roothub port enters U3,
     44 * long delay for the handshake of STS_HALT is neeed in xhci_suspend()
     45 * by using the XHCI_SLOW_SUSPEND quirk.
     46 */
     47#define SET_XHCI_PLAT_PRIV_FOR_RCAR(firmware)				\
     48	.firmware_name = firmware,					\
     49	.quirks = XHCI_NO_64BIT_SUPPORT | XHCI_TRUST_TX_LENGTH |	\
     50		  XHCI_SLOW_SUSPEND,					\
     51	.init_quirk = xhci_rcar_init_quirk,				\
     52	.plat_start = xhci_rcar_start,					\
     53	.resume_quirk = xhci_rcar_resume_quirk,
     54
     55#endif /* _XHCI_RCAR_H */