cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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g364fb.c (6364B)


      1/* $Id: g364fb.c,v 1.3 1998/08/28 22:43:00 tsbogend Exp $
      2 *
      3 * linux/drivers/video/g364fb.c -- Mips Magnum frame buffer device
      4 *
      5 * (C) 1998 Thomas Bogendoerfer
      6 *
      7 *  This driver is based on tgafb.c
      8 *
      9 *	Copyright (C) 1997 Geert Uytterhoeven 
     10 *	Copyright (C) 1995  Jay Estabrook
     11 *
     12 *  This file is subject to the terms and conditions of the GNU General Public
     13 *  License. See the file COPYING in the main directory of this archive for
     14 *  more details.
     15 */
     16
     17#include <linux/module.h>
     18#include <linux/console.h>
     19#include <linux/kernel.h>
     20#include <linux/errno.h>
     21#include <linux/string.h>
     22#include <linux/mm.h>
     23#include <linux/vmalloc.h>
     24#include <linux/delay.h>
     25#include <linux/interrupt.h>
     26#include <linux/fb.h>
     27#include <linux/init.h>
     28#include <asm/io.h>
     29#include <asm/jazz.h>
     30
     31/* 
     32 * Various defines for the G364
     33 */
     34#define G364_MEM_BASE   0xe4400000
     35#define G364_PORT_BASE  0xe4000000
     36#define ID_REG 		0xe4000000	/* Read only */
     37#define BOOT_REG 	0xe4080000
     38#define TIMING_REG 	0xe4080108	/* to 0x080170 - DON'T TOUCH! */
     39#define DISPLAY_REG 	0xe4080118
     40#define VDISPLAY_REG 	0xe4080150
     41#define MASK_REG 	0xe4080200
     42#define CTLA_REG 	0xe4080300
     43#define CURS_TOGGLE 	0x800000
     44#define BIT_PER_PIX	0x700000	/* bits 22 to 20 of Control A */
     45#define DELAY_SAMPLE    0x080000
     46#define PORT_INTER	0x040000
     47#define PIX_PIPE_DEL	0x030000	/* bits 17 and 16 of Control A */
     48#define PIX_PIPE_DEL2	0x008000	/* same as above - don't ask me why */
     49#define TR_CYCLE_TOG	0x004000
     50#define VRAM_ADR_INC	0x003000	/* bits 13 and 12 of Control A */
     51#define BLANK_OFF	0x000800
     52#define FORCE_BLANK	0x000400
     53#define BLK_FUN_SWTCH	0x000200
     54#define BLANK_IO	0x000100
     55#define BLANK_LEVEL	0x000080
     56#define A_VID_FORM	0x000040
     57#define D_SYNC_FORM	0x000020
     58#define FRAME_FLY_PAT	0x000010
     59#define OP_MODE		0x000008
     60#define INTL_STAND	0x000004
     61#define SCRN_FORM	0x000002
     62#define ENABLE_VTG	0x000001
     63#define TOP_REG 	0xe4080400
     64#define CURS_PAL_REG 	0xe4080508	/* to 0x080518 */
     65#define CHKSUM_REG 	0xe4080600	/* to 0x080610 - unused */
     66#define CURS_POS_REG 	0xe4080638
     67#define CLR_PAL_REG 	0xe4080800	/* to 0x080ff8 */
     68#define CURS_PAT_REG 	0xe4081000	/* to 0x081ff8 */
     69#define MON_ID_REG 	0xe4100000	/* unused */
     70#define RESET_REG 	0xe4180000	/* Write only */
     71
     72static struct fb_info fb_info;
     73
     74static struct fb_fix_screeninfo fb_fix __initdata = {
     75	.id 		= "G364 8plane",
     76	.smem_start 	= 0x40000000,	/* physical address */
     77	.type 		= FB_TYPE_PACKED_PIXELS,
     78	.visual 	= FB_VISUAL_PSEUDOCOLOR,
     79	.ypanstep 	= 1,
     80	.accel 		= FB_ACCEL_NONE,
     81};
     82
     83static struct fb_var_screeninfo fb_var __initdata = {
     84	.bits_per_pixel = 8,
     85	.red 		= { 0, 8, 0 },
     86      	.green 		= { 0, 8, 0 },
     87      	.blue		= { 0, 8, 0 },
     88      	.activate	= FB_ACTIVATE_NOW,
     89      	.height		= -1,
     90      	.width		= -1,
     91      	.pixclock	= 39722,
     92      	.left_margin	= 40,
     93      	.right_margin	= 24,
     94      	.upper_margin	= 32,
     95      	.lower_margin	= 11,
     96      	.hsync_len 	= 96,
     97      	.vsync_len 	= 2,
     98      	.vmode		= FB_VMODE_NONINTERLACED,
     99};
    100
    101/*
    102 *  Interface used by the world
    103 */
    104int g364fb_init(void);
    105
    106static int g364fb_pan_display(struct fb_var_screeninfo *var,
    107			      struct fb_info *info);
    108static int g364fb_setcolreg(u_int regno, u_int red, u_int green,
    109			    u_int blue, u_int transp,
    110			    struct fb_info *info);
    111static int g364fb_blank(int blank, struct fb_info *info);
    112
    113static const struct fb_ops g364fb_ops = {
    114	.owner		= THIS_MODULE,
    115	.fb_setcolreg	= g364fb_setcolreg,
    116	.fb_pan_display	= g364fb_pan_display,
    117	.fb_blank	= g364fb_blank,
    118	.fb_fillrect	= cfb_fillrect,
    119	.fb_copyarea	= cfb_copyarea,
    120	.fb_imageblit	= cfb_imageblit,
    121};
    122
    123/*
    124 *  Pan or Wrap the Display
    125 *
    126 *  This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag
    127 */
    128static int g364fb_pan_display(struct fb_var_screeninfo *var, 
    129			      struct fb_info *info)
    130{
    131	if (var->xoffset ||
    132	    var->yoffset + info->var.yres > info->var.yres_virtual)
    133		return -EINVAL;
    134
    135	*(unsigned int *) TOP_REG = var->yoffset * info->var.xres;
    136	return 0;
    137}
    138
    139/*
    140 *  Blank the display.
    141 */
    142static int g364fb_blank(int blank, struct fb_info *info)
    143{
    144	if (blank)
    145		*(unsigned int *) CTLA_REG |= FORCE_BLANK;
    146	else
    147		*(unsigned int *) CTLA_REG &= ~FORCE_BLANK;
    148	return 0;
    149}
    150
    151/*
    152 *  Set a single color register. Return != 0 for invalid regno.
    153 */
    154static int g364fb_setcolreg(u_int regno, u_int red, u_int green,
    155			    u_int blue, u_int transp, struct fb_info *info)
    156{
    157	volatile unsigned int *ptr = (volatile unsigned int *) CLR_PAL_REG;
    158
    159	if (regno > 255)
    160		return 1;
    161
    162	red >>= 8;
    163	green >>= 8;
    164	blue >>= 8;
    165
    166	ptr[regno << 1] = (red << 16) | (green << 8) | blue;
    167
    168	return 0;
    169}
    170
    171/*
    172 *  Initialisation
    173 */
    174int __init g364fb_init(void)
    175{
    176	volatile unsigned int *curs_pal_ptr =
    177	    (volatile unsigned int *) CURS_PAL_REG;
    178	int mem, i;
    179
    180	if (fb_get_options("g364fb", NULL))
    181		return -ENODEV;
    182
    183	/* TBD: G364 detection */
    184
    185	/* get the resolution set by ARC console */
    186	*(volatile unsigned int *) CTLA_REG &= ~ENABLE_VTG;
    187	fb_var.xres =
    188	    (*((volatile unsigned int *) DISPLAY_REG) & 0x00ffffff) * 4;
    189	fb_var.yres =
    190	    (*((volatile unsigned int *) VDISPLAY_REG) & 0x00ffffff) / 2;
    191	*(volatile unsigned int *) CTLA_REG |= ENABLE_VTG;
    192
    193	/* setup cursor */
    194	curs_pal_ptr[0] |= 0x00ffffff;
    195	curs_pal_ptr[2] |= 0x00ffffff;
    196	curs_pal_ptr[4] |= 0x00ffffff;
    197
    198	/*
    199	 * first set the whole cursor to transparent
    200	 */
    201	for (i = 0; i < 512; i++)
    202		*(unsigned short *) (CURS_PAT_REG + i * 8) = 0;
    203
    204	/*
    205	 * switch the last two lines to cursor palette 3
    206	 * we assume here, that FONTSIZE_X is 8
    207	 */
    208	*(unsigned short *) (CURS_PAT_REG + 14 * 64) = 0xffff;
    209	*(unsigned short *) (CURS_PAT_REG + 15 * 64) = 0xffff;
    210	fb_var.xres_virtual = fb_var.xres;
    211	fb_fix.line_length = fb_var.xres_virtual * fb_var.bits_per_pixel / 8;
    212	fb_fix.smem_start = 0x40000000;	/* physical address */
    213	/* get size of video memory; this is special for the JAZZ hardware */
    214	mem = (r4030_read_reg32(JAZZ_R4030_CONFIG) >> 8) & 3;
    215	fb_fix.smem_len = (1 << (mem * 2)) * 512 * 1024;
    216	fb_var.yres_virtual = fb_fix.smem_len / fb_var.xres;
    217
    218	fb_info.fbops = &g364fb_ops;
    219	fb_info.screen_base = (char *) G364_MEM_BASE;	/* virtual kernel address */
    220	fb_info.var = fb_var;
    221	fb_info.fix = fb_fix;
    222	fb_info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
    223
    224	fb_alloc_cmap(&fb_info.cmap, 255, 0);
    225
    226	if (register_framebuffer(&fb_info) < 0)
    227		return -EINVAL;
    228	return 0;
    229}
    230
    231module_init(g364fb_init);
    232MODULE_LICENSE("GPL");