cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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video_cs5530.h (2646B)


      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 * drivers/video/geode/video_cs5530.h
      4 *   -- CS5530 video device
      5 *
      6 * Copyright (C) 2005 Arcom Control Systems Ltd.
      7 *
      8 * Based on AMD's original 2.4 driver:
      9 *   Copyright (C) 2004 Advanced Micro Devices, Inc.
     10 */
     11#ifndef __VIDEO_CS5530_H__
     12#define __VIDEO_CS5530_H__
     13
     14extern const struct geode_vid_ops cs5530_vid_ops;
     15
     16/* CS5530 Video device registers */
     17
     18#define CS5530_VIDEO_CONFIG	0x0000
     19#  define CS5530_VCFG_VID_EN			0x00000001
     20#  define CS5530_VCFG_VID_REG_UPDATE		0x00000002
     21#  define CS5530_VCFG_VID_INP_FORMAT		0x0000000C
     22#  define CS5530_VCFG_8_BIT_4_2_0		0x00000004
     23#  define CS5530_VCFG_16_BIT_4_2_0		0x00000008
     24#  define CS5530_VCFG_GV_SEL			0x00000010
     25#  define CS5530_VCFG_CSC_BYPASS		0x00000020
     26#  define CS5530_VCFG_X_FILTER_EN		0x00000040
     27#  define CS5530_VCFG_Y_FILTER_EN		0x00000080
     28#  define CS5530_VCFG_LINE_SIZE_LOWER_MASK	0x0000FF00
     29#  define CS5530_VCFG_INIT_READ_MASK		0x01FF0000
     30#  define CS5530_VCFG_EARLY_VID_RDY		0x02000000
     31#  define CS5530_VCFG_LINE_SIZE_UPPER		0x08000000
     32#  define CS5530_VCFG_4_2_0_MODE		0x10000000
     33#  define CS5530_VCFG_16_BIT_EN			0x20000000
     34#  define CS5530_VCFG_HIGH_SPD_INT		0x40000000
     35
     36#define CS5530_DISPLAY_CONFIG	0x0004
     37#  define CS5530_DCFG_DIS_EN			0x00000001
     38#  define CS5530_DCFG_HSYNC_EN			0x00000002
     39#  define CS5530_DCFG_VSYNC_EN			0x00000004
     40#  define CS5530_DCFG_DAC_BL_EN			0x00000008
     41#  define CS5530_DCFG_DAC_PWR_EN		0x00000020
     42#  define CS5530_DCFG_FP_PWR_EN			0x00000040
     43#  define CS5530_DCFG_FP_DATA_EN		0x00000080
     44#  define CS5530_DCFG_CRT_HSYNC_POL		0x00000100
     45#  define CS5530_DCFG_CRT_VSYNC_POL		0x00000200
     46#  define CS5530_DCFG_FP_HSYNC_POL		0x00000400
     47#  define CS5530_DCFG_FP_VSYNC_POL		0x00000800
     48#  define CS5530_DCFG_XGA_FP			0x00001000
     49#  define CS5530_DCFG_FP_DITH_EN		0x00002000
     50#  define CS5530_DCFG_CRT_SYNC_SKW_MASK		0x0001C000
     51#  define CS5530_DCFG_CRT_SYNC_SKW_INIT		0x00010000
     52#  define CS5530_DCFG_PWR_SEQ_DLY_MASK		0x000E0000
     53#  define CS5530_DCFG_PWR_SEQ_DLY_INIT		0x00080000
     54#  define CS5530_DCFG_VG_CK			0x00100000
     55#  define CS5530_DCFG_GV_PAL_BYP		0x00200000
     56#  define CS5530_DCFG_DDC_SCL			0x00400000
     57#  define CS5530_DCFG_DDC_SDA			0x00800000
     58#  define CS5530_DCFG_DDC_OE			0x01000000
     59#  define CS5530_DCFG_16_BIT_EN			0x02000000
     60
     61#define CS5530_VIDEO_X_POS	0x0008
     62#define CS5530_VIDEO_Y_POS	0x000C
     63#define CS5530_VIDEO_SCALE	0x0010
     64#define CS5530_VIDEO_COLOR_KEY	0x0014
     65#define CS5530_VIDEO_COLOR_MASK 0x0018
     66#define CS5530_PALETTE_ADDRESS	0x001C
     67#define CS5530_PALETTE_DATA	0x0020
     68#define CS5530_DOT_CLK_CONFIG	0x0024
     69#define CS5530_CRCSIG_TFT_TV	0x0028
     70
     71#endif /* !__VIDEO_CS5530_H__ */