w1_ds2780.h (3863B)
1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * 1-Wire implementation for the ds2780 chip 4 * 5 * Copyright (C) 2010 Indesign, LLC 6 * 7 * Author: Clifton Barnes <cabarnes@indesign-llc.com> 8 * 9 * Based on w1-ds2760 driver 10 */ 11 12#ifndef _W1_DS2780_H 13#define _W1_DS2780_H 14 15/* Function commands */ 16#define W1_DS2780_READ_DATA 0x69 17#define W1_DS2780_WRITE_DATA 0x6C 18#define W1_DS2780_COPY_DATA 0x48 19#define W1_DS2780_RECALL_DATA 0xB8 20#define W1_DS2780_LOCK 0x6A 21 22/* Register map */ 23/* Register 0x00 Reserved */ 24#define DS2780_STATUS_REG 0x01 25#define DS2780_RAAC_MSB_REG 0x02 26#define DS2780_RAAC_LSB_REG 0x03 27#define DS2780_RSAC_MSB_REG 0x04 28#define DS2780_RSAC_LSB_REG 0x05 29#define DS2780_RARC_REG 0x06 30#define DS2780_RSRC_REG 0x07 31#define DS2780_IAVG_MSB_REG 0x08 32#define DS2780_IAVG_LSB_REG 0x09 33#define DS2780_TEMP_MSB_REG 0x0A 34#define DS2780_TEMP_LSB_REG 0x0B 35#define DS2780_VOLT_MSB_REG 0x0C 36#define DS2780_VOLT_LSB_REG 0x0D 37#define DS2780_CURRENT_MSB_REG 0x0E 38#define DS2780_CURRENT_LSB_REG 0x0F 39#define DS2780_ACR_MSB_REG 0x10 40#define DS2780_ACR_LSB_REG 0x11 41#define DS2780_ACRL_MSB_REG 0x12 42#define DS2780_ACRL_LSB_REG 0x13 43#define DS2780_AS_REG 0x14 44#define DS2780_SFR_REG 0x15 45#define DS2780_FULL_MSB_REG 0x16 46#define DS2780_FULL_LSB_REG 0x17 47#define DS2780_AE_MSB_REG 0x18 48#define DS2780_AE_LSB_REG 0x19 49#define DS2780_SE_MSB_REG 0x1A 50#define DS2780_SE_LSB_REG 0x1B 51/* Register 0x1C - 0x1E Reserved */ 52#define DS2780_EEPROM_REG 0x1F 53#define DS2780_EEPROM_BLOCK0_START 0x20 54/* Register 0x20 - 0x2F User EEPROM */ 55#define DS2780_EEPROM_BLOCK0_END 0x2F 56/* Register 0x30 - 0x5F Reserved */ 57#define DS2780_EEPROM_BLOCK1_START 0x60 58#define DS2780_CONTROL_REG 0x60 59#define DS2780_AB_REG 0x61 60#define DS2780_AC_MSB_REG 0x62 61#define DS2780_AC_LSB_REG 0x63 62#define DS2780_VCHG_REG 0x64 63#define DS2780_IMIN_REG 0x65 64#define DS2780_VAE_REG 0x66 65#define DS2780_IAE_REG 0x67 66#define DS2780_AE_40_REG 0x68 67#define DS2780_RSNSP_REG 0x69 68#define DS2780_FULL_40_MSB_REG 0x6A 69#define DS2780_FULL_40_LSB_REG 0x6B 70#define DS2780_FULL_3040_SLOPE_REG 0x6C 71#define DS2780_FULL_2030_SLOPE_REG 0x6D 72#define DS2780_FULL_1020_SLOPE_REG 0x6E 73#define DS2780_FULL_0010_SLOPE_REG 0x6F 74#define DS2780_AE_3040_SLOPE_REG 0x70 75#define DS2780_AE_2030_SLOPE_REG 0x71 76#define DS2780_AE_1020_SLOPE_REG 0x72 77#define DS2780_AE_0010_SLOPE_REG 0x73 78#define DS2780_SE_3040_SLOPE_REG 0x74 79#define DS2780_SE_2030_SLOPE_REG 0x75 80#define DS2780_SE_1020_SLOPE_REG 0x76 81#define DS2780_SE_0010_SLOPE_REG 0x77 82#define DS2780_RSGAIN_MSB_REG 0x78 83#define DS2780_RSGAIN_LSB_REG 0x79 84#define DS2780_RSTC_REG 0x7A 85#define DS2780_FRSGAIN_MSB_REG 0x7B 86#define DS2780_FRSGAIN_LSB_REG 0x7C 87#define DS2780_EEPROM_BLOCK1_END 0x7C 88/* Register 0x7D - 0xFF Reserved */ 89 90/* Number of valid register addresses */ 91#define DS2780_DATA_SIZE 0x80 92 93/* Status register bits */ 94#define DS2780_STATUS_REG_CHGTF (1 << 7) 95#define DS2780_STATUS_REG_AEF (1 << 6) 96#define DS2780_STATUS_REG_SEF (1 << 5) 97#define DS2780_STATUS_REG_LEARNF (1 << 4) 98/* Bit 3 Reserved */ 99#define DS2780_STATUS_REG_UVF (1 << 2) 100#define DS2780_STATUS_REG_PORF (1 << 1) 101/* Bit 0 Reserved */ 102 103/* Control register bits */ 104/* Bit 7 Reserved */ 105#define DS2780_CONTROL_REG_UVEN (1 << 6) 106#define DS2780_CONTROL_REG_PMOD (1 << 5) 107#define DS2780_CONTROL_REG_RNAOP (1 << 4) 108/* Bit 0 - 3 Reserved */ 109 110/* Special feature register bits */ 111/* Bit 1 - 7 Reserved */ 112#define DS2780_SFR_REG_PIOSC (1 << 0) 113 114/* EEPROM register bits */ 115#define DS2780_EEPROM_REG_EEC (1 << 7) 116#define DS2780_EEPROM_REG_LOCK (1 << 6) 117/* Bit 2 - 6 Reserved */ 118#define DS2780_EEPROM_REG_BL1 (1 << 1) 119#define DS2780_EEPROM_REG_BL0 (1 << 0) 120 121extern int w1_ds2780_io(struct device *dev, char *buf, int addr, size_t count, 122 int io); 123extern int w1_ds2780_eeprom_cmd(struct device *dev, int addr, int cmd); 124 125#endif /* !_W1_DS2780_H */