cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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max63xx_wdt.c (7581B)


      1/*
      2 * drivers/char/watchdog/max63xx_wdt.c
      3 *
      4 * Driver for max63{69,70,71,72,73,74} watchdog timers
      5 *
      6 * Copyright (C) 2009 Marc Zyngier <maz@misterjones.org>
      7 *
      8 * This file is licensed under the terms of the GNU General Public
      9 * License version 2. This program is licensed "as is" without any
     10 * warranty of any kind, whether express or implied.
     11 *
     12 * This driver assumes the watchdog pins are memory mapped (as it is
     13 * the case for the Arcom Zeus). Should it be connected over GPIOs or
     14 * another interface, some abstraction will have to be introduced.
     15 */
     16
     17#include <linux/err.h>
     18#include <linux/module.h>
     19#include <linux/moduleparam.h>
     20#include <linux/mod_devicetable.h>
     21#include <linux/types.h>
     22#include <linux/kernel.h>
     23#include <linux/watchdog.h>
     24#include <linux/bitops.h>
     25#include <linux/platform_device.h>
     26#include <linux/spinlock.h>
     27#include <linux/io.h>
     28#include <linux/slab.h>
     29#include <linux/property.h>
     30
     31#define DEFAULT_HEARTBEAT 60
     32#define MAX_HEARTBEAT     60
     33
     34static unsigned int heartbeat = DEFAULT_HEARTBEAT;
     35static bool nowayout  = WATCHDOG_NOWAYOUT;
     36
     37/*
     38 * Memory mapping: a single byte, 3 first lower bits to select bit 3
     39 * to ping the watchdog.
     40 */
     41#define MAX6369_WDSET	(7 << 0)
     42#define MAX6369_WDI	(1 << 3)
     43
     44#define MAX6369_WDSET_DISABLED	3
     45
     46static int nodelay;
     47
     48struct max63xx_wdt {
     49	struct watchdog_device wdd;
     50	const struct max63xx_timeout *timeout;
     51
     52	/* memory mapping */
     53	void __iomem *base;
     54	spinlock_t lock;
     55
     56	/* WDI and WSET bits write access routines */
     57	void (*ping)(struct max63xx_wdt *wdt);
     58	void (*set)(struct max63xx_wdt *wdt, u8 set);
     59};
     60
     61/*
     62 * The timeout values used are actually the absolute minimum the chip
     63 * offers. Typical values on my board are slightly over twice as long
     64 * (10s setting ends up with a 25s timeout), and can be up to 3 times
     65 * the nominal setting (according to the datasheet). So please take
     66 * these values with a grain of salt. Same goes for the initial delay
     67 * "feature". Only max6373/74 have a few settings without this initial
     68 * delay (selected with the "nodelay" parameter).
     69 *
     70 * I also decided to remove from the tables any timeout smaller than a
     71 * second, as it looked completly overkill...
     72 */
     73
     74/* Timeouts in second */
     75struct max63xx_timeout {
     76	const u8 wdset;
     77	const u8 tdelay;
     78	const u8 twd;
     79};
     80
     81static const struct max63xx_timeout max6369_table[] = {
     82	{ 5,  1,  1 },
     83	{ 6, 10, 10 },
     84	{ 7, 60, 60 },
     85	{ },
     86};
     87
     88static const struct max63xx_timeout max6371_table[] = {
     89	{ 6, 60,  3 },
     90	{ 7, 60, 60 },
     91	{ },
     92};
     93
     94static const struct max63xx_timeout max6373_table[] = {
     95	{ 2, 60,  1 },
     96	{ 5,  0,  1 },
     97	{ 1,  3,  3 },
     98	{ 7, 60, 10 },
     99	{ 6,  0, 10 },
    100	{ },
    101};
    102
    103static const struct max63xx_timeout *
    104max63xx_select_timeout(const struct max63xx_timeout *table, int value)
    105{
    106	while (table->twd) {
    107		if (value <= table->twd) {
    108			if (nodelay && table->tdelay == 0)
    109				return table;
    110
    111			if (!nodelay)
    112				return table;
    113		}
    114
    115		table++;
    116	}
    117
    118	return NULL;
    119}
    120
    121static int max63xx_wdt_ping(struct watchdog_device *wdd)
    122{
    123	struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd);
    124
    125	wdt->ping(wdt);
    126	return 0;
    127}
    128
    129static int max63xx_wdt_start(struct watchdog_device *wdd)
    130{
    131	struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd);
    132
    133	wdt->set(wdt, wdt->timeout->wdset);
    134
    135	/* check for a edge triggered startup */
    136	if (wdt->timeout->tdelay == 0)
    137		wdt->ping(wdt);
    138	return 0;
    139}
    140
    141static int max63xx_wdt_stop(struct watchdog_device *wdd)
    142{
    143	struct max63xx_wdt *wdt = watchdog_get_drvdata(wdd);
    144
    145	wdt->set(wdt, MAX6369_WDSET_DISABLED);
    146	return 0;
    147}
    148
    149static const struct watchdog_ops max63xx_wdt_ops = {
    150	.owner = THIS_MODULE,
    151	.start = max63xx_wdt_start,
    152	.stop = max63xx_wdt_stop,
    153	.ping = max63xx_wdt_ping,
    154};
    155
    156static const struct watchdog_info max63xx_wdt_info = {
    157	.options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
    158	.identity = "max63xx Watchdog",
    159};
    160
    161static void max63xx_mmap_ping(struct max63xx_wdt *wdt)
    162{
    163	u8 val;
    164
    165	spin_lock(&wdt->lock);
    166
    167	val = __raw_readb(wdt->base);
    168
    169	__raw_writeb(val | MAX6369_WDI, wdt->base);
    170	__raw_writeb(val & ~MAX6369_WDI, wdt->base);
    171
    172	spin_unlock(&wdt->lock);
    173}
    174
    175static void max63xx_mmap_set(struct max63xx_wdt *wdt, u8 set)
    176{
    177	u8 val;
    178
    179	spin_lock(&wdt->lock);
    180
    181	val = __raw_readb(wdt->base);
    182	val &= ~MAX6369_WDSET;
    183	val |= set & MAX6369_WDSET;
    184	__raw_writeb(val, wdt->base);
    185
    186	spin_unlock(&wdt->lock);
    187}
    188
    189static int max63xx_mmap_init(struct platform_device *p, struct max63xx_wdt *wdt)
    190{
    191	wdt->base = devm_platform_ioremap_resource(p, 0);
    192	if (IS_ERR(wdt->base))
    193		return PTR_ERR(wdt->base);
    194
    195	spin_lock_init(&wdt->lock);
    196
    197	wdt->ping = max63xx_mmap_ping;
    198	wdt->set = max63xx_mmap_set;
    199	return 0;
    200}
    201
    202static int max63xx_wdt_probe(struct platform_device *pdev)
    203{
    204	struct device *dev = &pdev->dev;
    205	struct max63xx_wdt *wdt;
    206	const struct max63xx_timeout *table;
    207	int err;
    208
    209	wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
    210	if (!wdt)
    211		return -ENOMEM;
    212
    213	/* Attempt to use fwnode first */
    214	table = device_get_match_data(dev);
    215	if (!table)
    216		table = (struct max63xx_timeout *)pdev->id_entry->driver_data;
    217
    218	if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
    219		heartbeat = DEFAULT_HEARTBEAT;
    220
    221	wdt->timeout = max63xx_select_timeout(table, heartbeat);
    222	if (!wdt->timeout) {
    223		dev_err(dev, "unable to satisfy %ds heartbeat request\n",
    224			heartbeat);
    225		return -EINVAL;
    226	}
    227
    228	err = max63xx_mmap_init(pdev, wdt);
    229	if (err)
    230		return err;
    231
    232	platform_set_drvdata(pdev, &wdt->wdd);
    233	watchdog_set_drvdata(&wdt->wdd, wdt);
    234
    235	wdt->wdd.parent = dev;
    236	wdt->wdd.timeout = wdt->timeout->twd;
    237	wdt->wdd.info = &max63xx_wdt_info;
    238	wdt->wdd.ops = &max63xx_wdt_ops;
    239
    240	watchdog_set_nowayout(&wdt->wdd, nowayout);
    241
    242	err = devm_watchdog_register_device(dev, &wdt->wdd);
    243	if (err)
    244		return err;
    245
    246	dev_info(dev, "using %ds heartbeat with %ds initial delay\n",
    247		 wdt->timeout->twd, wdt->timeout->tdelay);
    248	return 0;
    249}
    250
    251static const struct platform_device_id max63xx_id_table[] = {
    252	{ "max6369_wdt", (kernel_ulong_t)max6369_table, },
    253	{ "max6370_wdt", (kernel_ulong_t)max6369_table, },
    254	{ "max6371_wdt", (kernel_ulong_t)max6371_table, },
    255	{ "max6372_wdt", (kernel_ulong_t)max6371_table, },
    256	{ "max6373_wdt", (kernel_ulong_t)max6373_table, },
    257	{ "max6374_wdt", (kernel_ulong_t)max6373_table, },
    258	{ },
    259};
    260MODULE_DEVICE_TABLE(platform, max63xx_id_table);
    261
    262static const struct of_device_id max63xx_dt_id_table[] = {
    263	{ .compatible = "maxim,max6369", .data = max6369_table, },
    264	{ .compatible = "maxim,max6370", .data = max6369_table, },
    265	{ .compatible = "maxim,max6371", .data = max6371_table, },
    266	{ .compatible = "maxim,max6372", .data = max6371_table, },
    267	{ .compatible = "maxim,max6373", .data = max6373_table, },
    268	{ .compatible = "maxim,max6374", .data = max6373_table, },
    269	{ }
    270};
    271MODULE_DEVICE_TABLE(of, max63xx_dt_id_table);
    272
    273static struct platform_driver max63xx_wdt_driver = {
    274	.probe		= max63xx_wdt_probe,
    275	.id_table	= max63xx_id_table,
    276	.driver		= {
    277		.name	= "max63xx_wdt",
    278		.of_match_table = max63xx_dt_id_table,
    279	},
    280};
    281
    282module_platform_driver(max63xx_wdt_driver);
    283
    284MODULE_AUTHOR("Marc Zyngier <maz@misterjones.org>");
    285MODULE_DESCRIPTION("max63xx Watchdog Driver");
    286
    287module_param(heartbeat, int, 0);
    288MODULE_PARM_DESC(heartbeat,
    289		 "Watchdog heartbeat period in seconds from 1 to "
    290		 __MODULE_STRING(MAX_HEARTBEAT) ", default "
    291		 __MODULE_STRING(DEFAULT_HEARTBEAT));
    292
    293module_param(nowayout, bool, 0);
    294MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
    295		 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
    296
    297module_param(nodelay, int, 0);
    298MODULE_PARM_DESC(nodelay,
    299		 "Force selection of a timeout setting without initial delay "
    300		 "(max6373/74 only, default=0)");
    301
    302MODULE_LICENSE("GPL v2");