cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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arm_arch_timer.h (2601B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Copyright (C) 2012 ARM Ltd.
      4 */
      5#ifndef __CLKSOURCE_ARM_ARCH_TIMER_H
      6#define __CLKSOURCE_ARM_ARCH_TIMER_H
      7
      8#include <linux/bitops.h>
      9#include <linux/timecounter.h>
     10#include <linux/types.h>
     11
     12#define ARCH_TIMER_TYPE_CP15		BIT(0)
     13#define ARCH_TIMER_TYPE_MEM		BIT(1)
     14
     15#define ARCH_TIMER_CTRL_ENABLE		(1 << 0)
     16#define ARCH_TIMER_CTRL_IT_MASK		(1 << 1)
     17#define ARCH_TIMER_CTRL_IT_STAT		(1 << 2)
     18
     19#define CNTHCTL_EL1PCTEN		(1 << 0)
     20#define CNTHCTL_EL1PCEN			(1 << 1)
     21#define CNTHCTL_EVNTEN			(1 << 2)
     22#define CNTHCTL_EVNTDIR			(1 << 3)
     23#define CNTHCTL_EVNTI			(0xF << 4)
     24
     25enum arch_timer_reg {
     26	ARCH_TIMER_REG_CTRL,
     27	ARCH_TIMER_REG_CVAL,
     28};
     29
     30enum arch_timer_ppi_nr {
     31	ARCH_TIMER_PHYS_SECURE_PPI,
     32	ARCH_TIMER_PHYS_NONSECURE_PPI,
     33	ARCH_TIMER_VIRT_PPI,
     34	ARCH_TIMER_HYP_PPI,
     35	ARCH_TIMER_HYP_VIRT_PPI,
     36	ARCH_TIMER_MAX_TIMER_PPI
     37};
     38
     39enum arch_timer_spi_nr {
     40	ARCH_TIMER_PHYS_SPI,
     41	ARCH_TIMER_VIRT_SPI,
     42	ARCH_TIMER_MAX_TIMER_SPI
     43};
     44
     45#define ARCH_TIMER_PHYS_ACCESS		0
     46#define ARCH_TIMER_VIRT_ACCESS		1
     47#define ARCH_TIMER_MEM_PHYS_ACCESS	2
     48#define ARCH_TIMER_MEM_VIRT_ACCESS	3
     49
     50#define ARCH_TIMER_MEM_MAX_FRAMES	8
     51
     52#define ARCH_TIMER_USR_PCT_ACCESS_EN	(1 << 0) /* physical counter */
     53#define ARCH_TIMER_USR_VCT_ACCESS_EN	(1 << 1) /* virtual counter */
     54#define ARCH_TIMER_VIRT_EVT_EN		(1 << 2)
     55#define ARCH_TIMER_EVT_TRIGGER_SHIFT	(4)
     56#define ARCH_TIMER_EVT_TRIGGER_MASK	(0xF << ARCH_TIMER_EVT_TRIGGER_SHIFT)
     57#define ARCH_TIMER_USR_VT_ACCESS_EN	(1 << 8) /* virtual timer registers */
     58#define ARCH_TIMER_USR_PT_ACCESS_EN	(1 << 9) /* physical timer registers */
     59#define ARCH_TIMER_EVT_INTERVAL_SCALE	(1 << 17) /* EVNTIS in the ARMv8 ARM */
     60
     61#define ARCH_TIMER_EVT_STREAM_PERIOD_US	100
     62#define ARCH_TIMER_EVT_STREAM_FREQ				\
     63	(USEC_PER_SEC / ARCH_TIMER_EVT_STREAM_PERIOD_US)
     64
     65struct arch_timer_kvm_info {
     66	struct timecounter timecounter;
     67	int virtual_irq;
     68	int physical_irq;
     69};
     70
     71struct arch_timer_mem_frame {
     72	bool valid;
     73	phys_addr_t cntbase;
     74	size_t size;
     75	int phys_irq;
     76	int virt_irq;
     77};
     78
     79struct arch_timer_mem {
     80	phys_addr_t cntctlbase;
     81	size_t size;
     82	struct arch_timer_mem_frame frame[ARCH_TIMER_MEM_MAX_FRAMES];
     83};
     84
     85#ifdef CONFIG_ARM_ARCH_TIMER
     86
     87extern u32 arch_timer_get_rate(void);
     88extern u64 (*arch_timer_read_counter)(void);
     89extern struct arch_timer_kvm_info *arch_timer_get_kvm_info(void);
     90extern bool arch_timer_evtstrm_available(void);
     91
     92#else
     93
     94static inline u32 arch_timer_get_rate(void)
     95{
     96	return 0;
     97}
     98
     99static inline u64 arch_timer_read_counter(void)
    100{
    101	return 0;
    102}
    103
    104static inline bool arch_timer_evtstrm_available(void)
    105{
    106	return false;
    107}
    108
    109#endif
    110
    111#endif