cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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drm_scdc_helper.h (2757B)

      1/*
      2 * Copyright (c) 2015 NVIDIA Corporation. All rights reserved.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice (including the
     12 * next paragraph) shall be included in all copies or substantial portions
     13 * of the Software.
     14 *
     15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
     18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
     21 * DEALINGS IN THE SOFTWARE.
     22 */
     23
     24#ifndef DRM_SCDC_HELPER_H
     25#define DRM_SCDC_HELPER_H
     26
     27#include <linux/types.h>
     28
     29#include <drm/display/drm_scdc.h>
     30
     31struct i2c_adapter;
     32
     33ssize_t drm_scdc_read(struct i2c_adapter *adapter, u8 offset, void *buffer,
     34		      size_t size);
     35ssize_t drm_scdc_write(struct i2c_adapter *adapter, u8 offset,
     36		       const void *buffer, size_t size);
     37
     38/**
     39 * drm_scdc_readb - read a single byte from SCDC
     40 * @adapter: I2C adapter
     41 * @offset: offset of register to read
     42 * @value: return location for the register value
     43 *
     44 * Reads a single byte from SCDC. This is a convenience wrapper around the
     45 * drm_scdc_read() function.
     46 *
     47 * Returns:
     48 * 0 on success or a negative error code on failure.
     49 */
     50static inline int drm_scdc_readb(struct i2c_adapter *adapter, u8 offset,
     51				 u8 *value)
     52{
     53	return drm_scdc_read(adapter, offset, value, sizeof(*value));
     54}
     55
     56/**
     57 * drm_scdc_writeb - write a single byte to SCDC
     58 * @adapter: I2C adapter
     59 * @offset: offset of register to read
     60 * @value: return location for the register value
     61 *
     62 * Writes a single byte to SCDC. This is a convenience wrapper around the
     63 * drm_scdc_write() function.
     64 *
     65 * Returns:
     66 * 0 on success or a negative error code on failure.
     67 */
     68static inline int drm_scdc_writeb(struct i2c_adapter *adapter, u8 offset,
     69				  u8 value)
     70{
     71	return drm_scdc_write(adapter, offset, &value, sizeof(value));
     72}
     73
     74bool drm_scdc_get_scrambling_status(struct i2c_adapter *adapter);
     75
     76bool drm_scdc_set_scrambling(struct i2c_adapter *adapter, bool enable);
     77bool drm_scdc_set_high_tmds_clock_ratio(struct i2c_adapter *adapter, bool set);
     78
     79#endif