cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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drm_cache.h (3377B)


      1/**************************************************************************
      2 *
      3 * Copyright 2009 Red Hat Inc.
      4 * All Rights Reserved.
      5 *
      6 * Permission is hereby granted, free of charge, to any person obtaining a
      7 * copy of this software and associated documentation files (the
      8 * "Software"), to deal in the Software without restriction, including
      9 * without limitation the rights to use, copy, modify, merge, publish,
     10 * distribute, sub license, and/or sell copies of the Software, and to
     11 * permit persons to whom the Software is furnished to do so, subject to
     12 * the following conditions:
     13 *
     14 * The above copyright notice and this permission notice (including the
     15 * next paragraph) shall be included in all copies or substantial portions
     16 * of the Software.
     17 *
     18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
     21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
     22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
     23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
     24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
     25 *
     26 *
     27 **************************************************************************/
     28/*
     29 * Authors:
     30 * Dave Airlie <airlied@redhat.com>
     31 */
     32
     33#ifndef _DRM_CACHE_H_
     34#define _DRM_CACHE_H_
     35
     36#include <linux/scatterlist.h>
     37
     38struct iosys_map;
     39
     40void drm_clflush_pages(struct page *pages[], unsigned long num_pages);
     41void drm_clflush_sg(struct sg_table *st);
     42void drm_clflush_virt_range(void *addr, unsigned long length);
     43bool drm_need_swiotlb(int dma_bits);
     44
     45
     46static inline bool drm_arch_can_wc_memory(void)
     47{
     48#if defined(CONFIG_PPC) && !defined(CONFIG_NOT_COHERENT_CACHE)
     49	return false;
     50#elif defined(CONFIG_MIPS) && defined(CONFIG_CPU_LOONGSON64)
     51	return false;
     52#elif defined(CONFIG_ARM) || defined(CONFIG_ARM64)
     53	/*
     54	 * The DRM driver stack is designed to work with cache coherent devices
     55	 * only, but permits an optimization to be enabled in some cases, where
     56	 * for some buffers, both the CPU and the GPU use uncached mappings,
     57	 * removing the need for DMA snooping and allocation in the CPU caches.
     58	 *
     59	 * The use of uncached GPU mappings relies on the correct implementation
     60	 * of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU
     61	 * will use cached mappings nonetheless. On x86 platforms, this does not
     62	 * seem to matter, as uncached CPU mappings will snoop the caches in any
     63	 * case. However, on ARM and arm64, enabling this optimization on a
     64	 * platform where NoSnoop is ignored results in loss of coherency, which
     65	 * breaks correct operation of the device. Since we have no way of
     66	 * detecting whether NoSnoop works or not, just disable this
     67	 * optimization entirely for ARM and arm64.
     68	 */
     69	return false;
     70#elif defined(CONFIG_LOONGARCH)
     71	/*
     72	 * LoongArch maintains cache coherency in hardware, but its WUC attribute
     73	 * (Weak-ordered UnCached, which is similar to WC) is out of the scope of
     74	 * cache coherency machanism. This means WUC can only used for write-only
     75	 * memory regions.
     76	 */
     77	return false;
     78#else
     79	return true;
     80#endif
     81}
     82
     83void drm_memcpy_init_early(void);
     84
     85void drm_memcpy_from_wc(struct iosys_map *dst,
     86			const struct iosys_map *src,
     87			unsigned long len);
     88#endif