axis,artpec6-clkctrl.h (967B)
1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * ARTPEC-6 clock controller indexes 4 * 5 * Copyright 2016 Axis Communications AB. 6 */ 7 8#ifndef DT_BINDINGS_CLK_ARTPEC6_CLKCTRL_H 9#define DT_BINDINGS_CLK_ARTPEC6_CLKCTRL_H 10 11#define ARTPEC6_CLK_CPU 0 12#define ARTPEC6_CLK_CPU_PERIPH 1 13#define ARTPEC6_CLK_NAND_CLKA 2 14#define ARTPEC6_CLK_NAND_CLKB 3 15#define ARTPEC6_CLK_ETH_ACLK 4 16#define ARTPEC6_CLK_DMA_ACLK 5 17#define ARTPEC6_CLK_PTP_REF 6 18#define ARTPEC6_CLK_SD_PCLK 7 19#define ARTPEC6_CLK_SD_IMCLK 8 20#define ARTPEC6_CLK_I2S_HST 9 21#define ARTPEC6_CLK_I2S0_CLK 10 22#define ARTPEC6_CLK_I2S1_CLK 11 23#define ARTPEC6_CLK_UART_PCLK 12 24#define ARTPEC6_CLK_UART_REFCLK 13 25#define ARTPEC6_CLK_I2C 14 26#define ARTPEC6_CLK_SPI_PCLK 15 27#define ARTPEC6_CLK_SPI_SSPCLK 16 28#define ARTPEC6_CLK_SYS_TIMER 17 29#define ARTPEC6_CLK_FRACDIV_IN 18 30#define ARTPEC6_CLK_DBG_PCLK 19 31 32/* This must be the highest clock index plus one. */ 33#define ARTPEC6_CLK_NUMCLOCKS 20 34 35#endif