cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

bcm-nsp.h (2148B)

      1/*
      2 *  BSD LICENSE
      3 *
      4 *  Copyright(c) 2015 Broadcom Corporation.  All rights reserved.
      5 *
      6 *  Redistribution and use in source and binary forms, with or without
      7 *  modification, are permitted provided that the following conditions
      8 *  are met:
      9 *
     10 *	* Redistributions of source code must retain the above copyright
     11 *	  notice, this list of conditions and the following disclaimer.
     12 *	* Redistributions in binary form must reproduce the above copyright
     13 *	  notice, this list of conditions and the following disclaimer in
     14 *	  the documentation and/or other materials provided with the
     15 *	  distribution.
     16 *	* Neither the name of Broadcom Corporation nor the names of its
     17 *	  contributors may be used to endorse or promote products derived
     18 *	  from this software without specific prior written permission.
     19 *
     20 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     21 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
     22 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
     23 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
     24 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     25 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
     26 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31 */
     32
     33#ifndef _CLOCK_BCM_NSP_H
     34#define _CLOCK_BCM_NSP_H
     35
     36/* GENPLL clock channel ID */
     37#define BCM_NSP_GENPLL			0
     38#define BCM_NSP_GENPLL_PHY_CLK		1
     39#define BCM_NSP_GENPLL_ENET_SW_CLK	2
     40#define BCM_NSP_GENPLL_USB_PHY_REF_CLK	3
     41#define BCM_NSP_GENPLL_IPROCFAST_CLK	4
     42#define BCM_NSP_GENPLL_SATA1_CLK	5
     43#define BCM_NSP_GENPLL_SATA2_CLK	6
     44
     45/* LCPLL0 clock channel ID */
     46#define BCM_NSP_LCPLL0			0
     47#define BCM_NSP_LCPLL0_PCIE_PHY_REF_CLK	1
     48#define BCM_NSP_LCPLL0_SDIO_CLK		2
     49#define BCM_NSP_LCPLL0_DDR_PHY_CLK	3
     50
     51#endif /* _CLOCK_BCM_NSP_H */