cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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bcm281xx.h (2456B)


      1/*
      2 * Copyright (C) 2013 Broadcom Corporation
      3 * Copyright 2013 Linaro Limited
      4 *
      5 * This program is free software; you can redistribute it and/or
      6 * modify it under the terms of the GNU General Public License as
      7 * published by the Free Software Foundation version 2.
      8 *
      9 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
     10 * kind, whether express or implied; without even the implied warranty
     11 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     12 * GNU General Public License for more details.
     13 */
     14
     15#ifndef _CLOCK_BCM281XX_H
     16#define _CLOCK_BCM281XX_H
     17
     18/*
     19 * This file defines the values used to specify clocks provided by
     20 * the clock control units (CCUs) on Broadcom BCM281XX family SoCs.
     21 */
     22
     23/*
     24 * These are the bcm281xx CCU device tree "compatible" strings.
     25 * We're stuck with using "bcm11351" in the string because wild
     26 * cards aren't allowed, and that name was the first one defined
     27 * in this family of devices.
     28 */
     29#define BCM281XX_DT_ROOT_CCU_COMPAT	"brcm,bcm11351-root-ccu"
     30#define BCM281XX_DT_AON_CCU_COMPAT	"brcm,bcm11351-aon-ccu"
     31#define BCM281XX_DT_HUB_CCU_COMPAT	"brcm,bcm11351-hub-ccu"
     32#define BCM281XX_DT_MASTER_CCU_COMPAT	"brcm,bcm11351-master-ccu"
     33#define BCM281XX_DT_SLAVE_CCU_COMPAT	"brcm,bcm11351-slave-ccu"
     34
     35/* root CCU clock ids */
     36
     37#define BCM281XX_ROOT_CCU_FRAC_1M		0
     38#define BCM281XX_ROOT_CCU_CLOCK_COUNT		1
     39
     40/* aon CCU clock ids */
     41
     42#define BCM281XX_AON_CCU_HUB_TIMER		0
     43#define BCM281XX_AON_CCU_PMU_BSC		1
     44#define BCM281XX_AON_CCU_PMU_BSC_VAR		2
     45#define BCM281XX_AON_CCU_CLOCK_COUNT		3
     46
     47/* hub CCU clock ids */
     48
     49#define BCM281XX_HUB_CCU_TMON_1M		0
     50#define BCM281XX_HUB_CCU_CLOCK_COUNT		1
     51
     52/* master CCU clock ids */
     53
     54#define BCM281XX_MASTER_CCU_SDIO1		0
     55#define BCM281XX_MASTER_CCU_SDIO2		1
     56#define BCM281XX_MASTER_CCU_SDIO3		2
     57#define BCM281XX_MASTER_CCU_SDIO4		3
     58#define BCM281XX_MASTER_CCU_USB_IC		4
     59#define BCM281XX_MASTER_CCU_HSIC2_48M		5
     60#define BCM281XX_MASTER_CCU_HSIC2_12M		6
     61#define BCM281XX_MASTER_CCU_CLOCK_COUNT		7
     62
     63/* slave CCU clock ids */
     64
     65#define BCM281XX_SLAVE_CCU_UARTB		0
     66#define BCM281XX_SLAVE_CCU_UARTB2		1
     67#define BCM281XX_SLAVE_CCU_UARTB3		2
     68#define BCM281XX_SLAVE_CCU_UARTB4		3
     69#define BCM281XX_SLAVE_CCU_SSP0			4
     70#define BCM281XX_SLAVE_CCU_SSP2			5
     71#define BCM281XX_SLAVE_CCU_BSC1			6
     72#define BCM281XX_SLAVE_CCU_BSC2			7
     73#define BCM281XX_SLAVE_CCU_BSC3			8
     74#define BCM281XX_SLAVE_CCU_PWM			9
     75#define BCM281XX_SLAVE_CCU_CLOCK_COUNT		10
     76
     77#endif /* _CLOCK_BCM281XX_H */