mt8173-gce.h (1286B)
1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright (c) 2018 MediaTek Inc. 4 * Author: Houlong Wei <houlong.wei@mediatek.com> 5 * 6 */ 7 8#ifndef _DT_BINDINGS_GCE_MT8173_H 9#define _DT_BINDINGS_GCE_MT8173_H 10 11/* GCE HW thread priority */ 12#define CMDQ_THR_PRIO_LOWEST 0 13#define CMDQ_THR_PRIO_HIGHEST 1 14 15/* GCE SUBSYS */ 16#define SUBSYS_1400XXXX 1 17#define SUBSYS_1401XXXX 2 18#define SUBSYS_1402XXXX 3 19 20/* GCE HW EVENT */ 21#define CMDQ_EVENT_DISP_OVL0_SOF 11 22#define CMDQ_EVENT_DISP_OVL1_SOF 12 23#define CMDQ_EVENT_DISP_RDMA0_SOF 13 24#define CMDQ_EVENT_DISP_RDMA1_SOF 14 25#define CMDQ_EVENT_DISP_RDMA2_SOF 15 26#define CMDQ_EVENT_DISP_WDMA0_SOF 16 27#define CMDQ_EVENT_DISP_WDMA1_SOF 17 28#define CMDQ_EVENT_DISP_OVL0_EOF 39 29#define CMDQ_EVENT_DISP_OVL1_EOF 40 30#define CMDQ_EVENT_DISP_RDMA0_EOF 41 31#define CMDQ_EVENT_DISP_RDMA1_EOF 42 32#define CMDQ_EVENT_DISP_RDMA2_EOF 43 33#define CMDQ_EVENT_DISP_WDMA0_EOF 44 34#define CMDQ_EVENT_DISP_WDMA1_EOF 45 35#define CMDQ_EVENT_MUTEX0_STREAM_EOF 53 36#define CMDQ_EVENT_MUTEX1_STREAM_EOF 54 37#define CMDQ_EVENT_MUTEX2_STREAM_EOF 55 38#define CMDQ_EVENT_MUTEX3_STREAM_EOF 56 39#define CMDQ_EVENT_MUTEX4_STREAM_EOF 57 40#define CMDQ_EVENT_DISP_RDMA0_UNDERRUN 63 41#define CMDQ_EVENT_DISP_RDMA1_UNDERRUN 64 42#define CMDQ_EVENT_DISP_RDMA2_UNDERRUN 65 43 44#endif