cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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meson8b-gpio.h (2314B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * GPIO definitions for Amlogic Meson8b SoCs
      4 *
      5 * Copyright (C) 2015 Endless Mobile, Inc.
      6 * Author: Carlo Caione <carlo@endlessm.com>
      7 */
      8
      9#ifndef _DT_BINDINGS_MESON8B_GPIO_H
     10#define _DT_BINDINGS_MESON8B_GPIO_H
     11
     12/* EE (CBUS) GPIO chip */
     13#define GPIOX_0		0
     14#define GPIOX_1		1
     15#define GPIOX_2		2
     16#define GPIOX_3		3
     17#define GPIOX_4		4
     18#define GPIOX_5		5
     19#define GPIOX_6		6
     20#define GPIOX_7		7
     21#define GPIOX_8		8
     22#define GPIOX_9		9
     23#define GPIOX_10	10
     24#define GPIOX_11	11
     25#define GPIOX_16	12
     26#define GPIOX_17	13
     27#define GPIOX_18	14
     28#define GPIOX_19	15
     29#define GPIOX_20	16
     30#define GPIOX_21	17
     31
     32#define GPIOY_0		18
     33#define GPIOY_1		19
     34#define GPIOY_3		20
     35#define GPIOY_6		21
     36#define GPIOY_7		22
     37#define GPIOY_8		23
     38#define GPIOY_9		24
     39#define GPIOY_10	25
     40#define GPIOY_11	26
     41#define GPIOY_12	27
     42#define GPIOY_13	28
     43#define GPIOY_14	29
     44
     45#define GPIODV_9	30
     46#define GPIODV_24	31
     47#define GPIODV_25	32
     48#define GPIODV_26	33
     49#define GPIODV_27	34
     50#define GPIODV_28	35
     51#define GPIODV_29	36
     52
     53#define GPIOH_0		37
     54#define GPIOH_1		38
     55#define GPIOH_2		39
     56#define GPIOH_3		40
     57#define GPIOH_4		41
     58#define GPIOH_5		42
     59#define GPIOH_6		43
     60#define GPIOH_7		44
     61#define GPIOH_8		45
     62#define GPIOH_9		46
     63
     64#define CARD_0		47
     65#define CARD_1		48
     66#define CARD_2		49
     67#define CARD_3		50
     68#define CARD_4		51
     69#define CARD_5		52
     70#define CARD_6		53
     71
     72#define BOOT_0		54
     73#define BOOT_1		55
     74#define BOOT_2		56
     75#define BOOT_3		57
     76#define BOOT_4		58
     77#define BOOT_5		59
     78#define BOOT_6		60
     79#define BOOT_7		61
     80#define BOOT_8		62
     81#define BOOT_9		63
     82#define BOOT_10		64
     83#define BOOT_11		65
     84#define BOOT_12		66
     85#define BOOT_13		67
     86#define BOOT_14		68
     87#define BOOT_15		69
     88#define BOOT_16		70
     89#define BOOT_17		71
     90#define BOOT_18		72
     91
     92#define DIF_0_P		73
     93#define DIF_0_N		74
     94#define DIF_1_P		75
     95#define DIF_1_N		76
     96#define DIF_2_P		77
     97#define DIF_2_N		78
     98#define DIF_3_P		79
     99#define DIF_3_N		80
    100#define DIF_4_P		81
    101#define DIF_4_N		82
    102
    103/* AO GPIO chip */
    104#define GPIOAO_0	0
    105#define GPIOAO_1	1
    106#define GPIOAO_2	2
    107#define GPIOAO_3	3
    108#define GPIOAO_4	4
    109#define GPIOAO_5	5
    110#define GPIOAO_6	6
    111#define GPIOAO_7	7
    112#define GPIOAO_8	8
    113#define GPIOAO_9	9
    114#define GPIOAO_10	10
    115#define GPIOAO_11	11
    116#define GPIOAO_12	12
    117#define GPIOAO_13	13
    118#define GPIO_BSD_EN	14
    119#define GPIO_TEST_N	15
    120
    121#endif /* _DT_BINDINGS_MESON8B_GPIO_H */