cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qcom,msm8939.h (2633B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Qualcomm interconnect IDs
      4 *
      5 * Copyright (c) 2020, Linaro Ltd.
      6 * Author: Jun Nie <jun.nie@linaro.org>
      7 */
      8
      9#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MSM8939_H
     10#define __DT_BINDINGS_INTERCONNECT_QCOM_MSM8939_H
     11
     12#define BIMC_SNOC_SLV			0
     13#define MASTER_QDSS_BAM			1
     14#define MASTER_QDSS_ETR			2
     15#define MASTER_SNOC_CFG			3
     16#define PCNOC_SNOC_SLV			4
     17#define SLAVE_APSS			5
     18#define SLAVE_CATS_128			6
     19#define SLAVE_OCMEM_64			7
     20#define SLAVE_IMEM			8
     21#define SLAVE_QDSS_STM			9
     22#define SLAVE_SRVC_SNOC			10
     23#define SNOC_BIMC_0_MAS			11
     24#define SNOC_BIMC_1_MAS			12
     25#define SNOC_BIMC_2_MAS			13
     26#define SNOC_INT_0			14
     27#define SNOC_INT_1			15
     28#define SNOC_INT_BIMC			16
     29#define SNOC_PCNOC_MAS			17
     30#define SNOC_QDSS_INT			18
     31
     32#define MASTER_VIDEO_P0			0
     33#define MASTER_JPEG			1
     34#define MASTER_VFE			2
     35#define MASTER_MDP_PORT0		3
     36#define MASTER_MDP_PORT1		4
     37#define MASTER_CPP			5
     38#define SNOC_MM_INT_0			6
     39#define SNOC_MM_INT_1			7
     40#define SNOC_MM_INT_2			8
     41
     42#define BIMC_SNOC_MAS			0
     43#define MASTER_AMPSS_M0			1
     44#define MASTER_GRAPHICS_3D		2
     45#define MASTER_TCU0			3
     46#define SLAVE_AMPSS_L2			4
     47#define SLAVE_EBI_CH0			5
     48#define SNOC_BIMC_0_SLV			6
     49#define SNOC_BIMC_1_SLV			7
     50#define SNOC_BIMC_2_SLV			8
     51
     52#define MASTER_BLSP_1			0
     53#define MASTER_DEHR			1
     54#define MASTER_LPASS			2
     55#define MASTER_CRYPTO_CORE0		3
     56#define MASTER_SDCC_1			4
     57#define MASTER_SDCC_2			5
     58#define MASTER_SPDM			6
     59#define MASTER_USB_HS1			7
     60#define MASTER_USB_HS2			8
     61#define PCNOC_INT_0			9
     62#define PCNOC_INT_1			10
     63#define PCNOC_MAS_0			11
     64#define PCNOC_MAS_1			12
     65#define PCNOC_SLV_0			13
     66#define PCNOC_SLV_1			14
     67#define PCNOC_SLV_2			15
     68#define PCNOC_SLV_3			16
     69#define PCNOC_SLV_4			17
     70#define PCNOC_SLV_8			18
     71#define PCNOC_SLV_9			19
     72#define PCNOC_SNOC_MAS			20
     73#define SLAVE_BIMC_CFG			21
     74#define SLAVE_BLSP_1			22
     75#define SLAVE_BOOT_ROM			23
     76#define SLAVE_CAMERA_CFG		24
     77#define SLAVE_CLK_CTL			25
     78#define SLAVE_CRYPTO_0_CFG			26
     79#define SLAVE_DEHR_CFG			27
     80#define SLAVE_DISPLAY_CFG			28
     81#define SLAVE_GRAPHICS_3D_CFG			29
     82#define SLAVE_IMEM_CFG			30
     83#define SLAVE_LPASS			31
     84#define SLAVE_MPM			32
     85#define SLAVE_MSG_RAM			33
     86#define SLAVE_MSS			34
     87#define SLAVE_PDM			35
     88#define SLAVE_PMIC_ARB			36
     89#define SLAVE_PCNOC_CFG			37
     90#define SLAVE_PRNG			38
     91#define SLAVE_QDSS_CFG			39
     92#define SLAVE_RBCPR_CFG			40
     93#define SLAVE_SDCC_1			41
     94#define SLAVE_SDCC_2			42
     95#define SLAVE_SECURITY			43
     96#define SLAVE_SNOC_CFG			44
     97#define SLAVE_SPDM			45
     98#define SLAVE_TCSR			46
     99#define SLAVE_TLMM			47
    100#define SLAVE_USB_HS1			48
    101#define SLAVE_USB_HS2			49
    102#define SLAVE_VENUS_CFG			50
    103#define SNOC_PCNOC_SLV			51
    104
    105#endif