cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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phy-qcom-qusb2.h (1217B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
      4 */
      5
      6#ifndef _DT_BINDINGS_QCOM_PHY_QUSB2_H_
      7#define _DT_BINDINGS_QCOM_PHY_QUSB2_H_
      8
      9/* PHY HSTX TRIM bit values (24mA to 15mA) */
     10#define QUSB2_V2_HSTX_TRIM_24_0_MA		0x0
     11#define QUSB2_V2_HSTX_TRIM_23_4_MA		0x1
     12#define QUSB2_V2_HSTX_TRIM_22_8_MA		0x2
     13#define QUSB2_V2_HSTX_TRIM_22_2_MA		0x3
     14#define QUSB2_V2_HSTX_TRIM_21_6_MA		0x4
     15#define QUSB2_V2_HSTX_TRIM_21_0_MA		0x5
     16#define QUSB2_V2_HSTX_TRIM_20_4_MA		0x6
     17#define QUSB2_V2_HSTX_TRIM_19_8_MA		0x7
     18#define QUSB2_V2_HSTX_TRIM_19_2_MA		0x8
     19#define QUSB2_V2_HSTX_TRIM_18_6_MA		0x9
     20#define QUSB2_V2_HSTX_TRIM_18_0_MA		0xa
     21#define QUSB2_V2_HSTX_TRIM_17_4_MA		0xb
     22#define QUSB2_V2_HSTX_TRIM_16_8_MA		0xc
     23#define QUSB2_V2_HSTX_TRIM_16_2_MA		0xd
     24#define QUSB2_V2_HSTX_TRIM_15_6_MA		0xe
     25#define QUSB2_V2_HSTX_TRIM_15_0_MA		0xf
     26
     27/* PHY PREEMPHASIS bit values */
     28#define QUSB2_V2_PREEMPHASIS_NONE		0
     29#define QUSB2_V2_PREEMPHASIS_5_PERCENT		1
     30#define QUSB2_V2_PREEMPHASIS_10_PERCENT		2
     31#define QUSB2_V2_PREEMPHASIS_15_PERCENT		3
     32
     33/* PHY PREEMPHASIS-WIDTH bit values */
     34#define QUSB2_V2_PREEMPHASIS_WIDTH_FULL_BIT	0
     35#define QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT	1
     36
     37#endif