cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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at91.h (1494B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * This header provides constants for most at91 pinctrl bindings.
      4 *
      5 * Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
      6 */
      7
      8#ifndef __DT_BINDINGS_AT91_PINCTRL_H__
      9#define __DT_BINDINGS_AT91_PINCTRL_H__
     10
     11#define AT91_PINCTRL_NONE		(0 << 0)
     12#define AT91_PINCTRL_PULL_UP		(1 << 0)
     13#define AT91_PINCTRL_MULTI_DRIVE	(1 << 1)
     14#define AT91_PINCTRL_DEGLITCH		(1 << 2)
     15#define AT91_PINCTRL_PULL_DOWN		(1 << 3)
     16#define AT91_PINCTRL_DIS_SCHMIT		(1 << 4)
     17#define AT91_PINCTRL_OUTPUT		(1 << 7)
     18#define AT91_PINCTRL_OUTPUT_VAL(x)	((x & 0x1) << 8)
     19#define AT91_PINCTRL_SLEWRATE		(1 << 9)
     20#define AT91_PINCTRL_DEBOUNCE		(1 << 16)
     21#define AT91_PINCTRL_DEBOUNCE_VAL(x)	(x << 17)
     22
     23#define AT91_PINCTRL_PULL_UP_DEGLITCH	(AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DEGLITCH)
     24
     25#define AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT		(0x0 << 5)
     26#define AT91_PINCTRL_DRIVE_STRENGTH_LOW			(0x1 << 5)
     27#define AT91_PINCTRL_DRIVE_STRENGTH_MED			(0x2 << 5)
     28#define AT91_PINCTRL_DRIVE_STRENGTH_HI			(0x3 << 5)
     29
     30#define AT91_PINCTRL_SLEWRATE_ENA	(0x0 << 9)
     31#define AT91_PINCTRL_SLEWRATE_DIS	(0x1 << 9)
     32
     33#define AT91_PIOA	0
     34#define AT91_PIOB	1
     35#define AT91_PIOC	2
     36#define AT91_PIOD	3
     37#define AT91_PIOE	4
     38
     39#define AT91_PERIPH_GPIO	0
     40#define AT91_PERIPH_A		1
     41#define AT91_PERIPH_B		2
     42#define AT91_PERIPH_C		3
     43#define AT91_PERIPH_D		4
     44
     45#define ATMEL_PIO_DRVSTR_LO	1
     46#define ATMEL_PIO_DRVSTR_ME	2
     47#define ATMEL_PIO_DRVSTR_HI	3
     48
     49#endif /* __DT_BINDINGS_AT91_PINCTRL_H__ */