cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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r8a779g0-sysc.h (1301B)


      1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
      2/*
      3 * Copyright (C) 2022 Renesas Electronics Corp.
      4 */
      5#ifndef __DT_BINDINGS_POWER_R8A779G0_SYSC_H__
      6#define __DT_BINDINGS_POWER_R8A779G0_SYSC_H__
      7
      8/*
      9 * These power domain indices match the Power Domain Register Numbers (PDR)
     10 */
     11
     12#define R8A779G0_PD_A1E0D0C0		0
     13#define R8A779G0_PD_A1E0D0C1		1
     14#define R8A779G0_PD_A1E0D1C0		2
     15#define R8A779G0_PD_A1E0D1C1		3
     16#define R8A779G0_PD_A2E0D0		16
     17#define R8A779G0_PD_A2E0D1		17
     18#define R8A779G0_PD_A3E0		20
     19#define R8A779G0_PD_A33DGA		24
     20#define R8A779G0_PD_A23DGB		25
     21#define R8A779G0_PD_A1DSP0		33
     22#define R8A779G0_PD_A2IMP01		34
     23#define R8A779G0_PD_A2PSC		35
     24#define R8A779G0_PD_A2CV0		36
     25#define R8A779G0_PD_A2CV1		37
     26#define R8A779G0_PD_A1CNN0		41
     27#define R8A779G0_PD_A2CN0		42
     28#define R8A779G0_PD_A3IR		43
     29#define R8A779G0_PD_A1DSP1		45
     30#define R8A779G0_PD_A2IMP23		46
     31#define R8A779G0_PD_A2DMA		47
     32#define R8A779G0_PD_A2CV2		48
     33#define R8A779G0_PD_A2CV3		49
     34#define R8A779G0_PD_A1DSP2		53
     35#define R8A779G0_PD_A1DSP3		54
     36#define R8A779G0_PD_A3VIP0		56
     37#define R8A779G0_PD_A3VIP1		57
     38#define R8A779G0_PD_A3VIP2		58
     39#define R8A779G0_PD_A3ISP0		60
     40#define R8A779G0_PD_A3ISP1		61
     41
     42/* Always-on power area */
     43#define R8A779G0_PD_ALWAYS_ON		64
     44
     45#endif /* __DT_BINDINGS_POWER_R8A779G0_SYSC_H__*/