mt8195-resets.h (1142B)
1/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)*/ 2/* 3 * Copyright (c) 2021 MediaTek Inc. 4 * Author: Christine Zhu <christine.zhu@mediatek.com> 5 */ 6 7#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8195 8#define _DT_BINDINGS_RESET_CONTROLLER_MT8195 9 10#define MT8195_TOPRGU_CONN_MCU_SW_RST 0 11#define MT8195_TOPRGU_INFRA_GRST_SW_RST 1 12#define MT8195_TOPRGU_APU_SW_RST 2 13#define MT8195_TOPRGU_INFRA_AO_GRST_SW_RST 6 14#define MT8195_TOPRGU_MMSYS_SW_RST 7 15#define MT8195_TOPRGU_MFG_SW_RST 8 16#define MT8195_TOPRGU_VENC_SW_RST 9 17#define MT8195_TOPRGU_VDEC_SW_RST 10 18#define MT8195_TOPRGU_IMG_SW_RST 11 19#define MT8195_TOPRGU_APMIXEDSYS_SW_RST 13 20#define MT8195_TOPRGU_AUDIO_SW_RST 14 21#define MT8195_TOPRGU_CAMSYS_SW_RST 15 22#define MT8195_TOPRGU_EDPTX_SW_RST 16 23#define MT8195_TOPRGU_ADSPSYS_SW_RST 21 24#define MT8195_TOPRGU_DPTX_SW_RST 22 25#define MT8195_TOPRGU_SPMI_MST_SW_RST 23 26 27#define MT8195_TOPRGU_SW_RST_NUM 16 28 29#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8195 */