cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pistachio-resets.h (1085B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * This header provides constants for the reset controller
      4 * present in the Pistachio SoC
      5 */
      6
      7#ifndef _PISTACHIO_RESETS_H
      8#define _PISTACHIO_RESETS_H
      9
     10#define PISTACHIO_RESET_I2C0		0
     11#define PISTACHIO_RESET_I2C1		1
     12#define PISTACHIO_RESET_I2C2		2
     13#define PISTACHIO_RESET_I2C3		3
     14#define PISTACHIO_RESET_I2S_IN		4
     15#define PISTACHIO_RESET_PRL_OUT		5
     16#define PISTACHIO_RESET_SPDIF_OUT	6
     17#define PISTACHIO_RESET_SPI		7
     18#define PISTACHIO_RESET_PWM_PDM		8
     19#define PISTACHIO_RESET_UART0		9
     20#define PISTACHIO_RESET_UART1		10
     21#define PISTACHIO_RESET_QSPI		11
     22#define PISTACHIO_RESET_MDC		12
     23#define PISTACHIO_RESET_SDHOST		13
     24#define PISTACHIO_RESET_ETHERNET	14
     25#define PISTACHIO_RESET_IR		15
     26#define PISTACHIO_RESET_HASH		16
     27#define PISTACHIO_RESET_TIMER		17
     28#define PISTACHIO_RESET_I2S_OUT		18
     29#define PISTACHIO_RESET_SPDIF_IN	19
     30#define PISTACHIO_RESET_EVT		20
     31#define PISTACHIO_RESET_USB_H		21
     32#define PISTACHIO_RESET_USB_PR		22
     33#define PISTACHIO_RESET_USB_PHY_PR	23
     34#define PISTACHIO_RESET_USB_PHY_PON	24
     35#define PISTACHIO_RESET_MAX		24
     36
     37#endif