cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sun6i-a31-ccu.h (3595B)


      1/*
      2 * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
      3 *
      4 * This file is dual-licensed: you can use it either under the terms
      5 * of the GPL or the X11 license, at your option. Note that this dual
      6 * licensing only applies to this file, and not this project as a
      7 * whole.
      8 *
      9 *  a) This file is free software; you can redistribute it and/or
     10 *     modify it under the terms of the GNU General Public License as
     11 *     published by the Free Software Foundation; either version 2 of the
     12 *     License, or (at your option) any later version.
     13 *
     14 *     This file is distributed in the hope that it will be useful,
     15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     17 *     GNU General Public License for more details.
     18 *
     19 * Or, alternatively,
     20 *
     21 *  b) Permission is hereby granted, free of charge, to any person
     22 *     obtaining a copy of this software and associated documentation
     23 *     files (the "Software"), to deal in the Software without
     24 *     restriction, including without limitation the rights to use,
     25 *     copy, modify, merge, publish, distribute, sublicense, and/or
     26 *     sell copies of the Software, and to permit persons to whom the
     27 *     Software is furnished to do so, subject to the following
     28 *     conditions:
     29 *
     30 *     The above copyright notice and this permission notice shall be
     31 *     included in all copies or substantial portions of the Software.
     32 *
     33 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     34 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     35 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     36 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     37 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     38 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     39 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     40 *     OTHER DEALINGS IN THE SOFTWARE.
     41 */
     42
     43#ifndef _DT_BINDINGS_RST_SUN6I_A31_H_
     44#define _DT_BINDINGS_RST_SUN6I_A31_H_
     45
     46#define RST_USB_PHY0		0
     47#define RST_USB_PHY1		1
     48#define RST_USB_PHY2		2
     49
     50#define RST_AHB1_MIPI_DSI	3
     51#define RST_AHB1_SS		4
     52#define RST_AHB1_DMA		5
     53#define RST_AHB1_MMC0		6
     54#define RST_AHB1_MMC1		7
     55#define RST_AHB1_MMC2		8
     56#define RST_AHB1_MMC3		9
     57#define RST_AHB1_NAND1		10
     58#define RST_AHB1_NAND0		11
     59#define RST_AHB1_SDRAM		12
     60#define RST_AHB1_EMAC		13
     61#define RST_AHB1_TS		14
     62#define RST_AHB1_HSTIMER	15
     63#define RST_AHB1_SPI0		16
     64#define RST_AHB1_SPI1		17
     65#define RST_AHB1_SPI2		18
     66#define RST_AHB1_SPI3		19
     67#define RST_AHB1_OTG		20
     68#define RST_AHB1_EHCI0		21
     69#define RST_AHB1_EHCI1		22
     70#define RST_AHB1_OHCI0		23
     71#define RST_AHB1_OHCI1		24
     72#define RST_AHB1_OHCI2		25
     73#define RST_AHB1_VE		26
     74#define RST_AHB1_LCD0		27
     75#define RST_AHB1_LCD1		28
     76#define RST_AHB1_CSI		29
     77#define RST_AHB1_HDMI		30
     78#define RST_AHB1_BE0		31
     79#define RST_AHB1_BE1		32
     80#define RST_AHB1_FE0		33
     81#define RST_AHB1_FE1		34
     82#define RST_AHB1_MP		35
     83#define RST_AHB1_GPU		36
     84#define RST_AHB1_DEU0		37
     85#define RST_AHB1_DEU1		38
     86#define RST_AHB1_DRC0		39
     87#define RST_AHB1_DRC1		40
     88#define RST_AHB1_LVDS		41
     89
     90#define RST_APB1_CODEC		42
     91#define RST_APB1_SPDIF		43
     92#define RST_APB1_DIGITAL_MIC	44
     93#define RST_APB1_DAUDIO0	45
     94#define RST_APB1_DAUDIO1	46
     95#define RST_APB2_I2C0		47
     96#define RST_APB2_I2C1		48
     97#define RST_APB2_I2C2		49
     98#define RST_APB2_I2C3		50
     99#define RST_APB2_UART0		51
    100#define RST_APB2_UART1		52
    101#define RST_APB2_UART2		53
    102#define RST_APB2_UART3		54
    103#define RST_APB2_UART4		55
    104#define RST_APB2_UART5		56
    105
    106#endif /* _DT_BINDINGS_RST_SUN6I_A31_H_ */