cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

sun8i-a23-a33-ccu.h (3135B)


      1/*
      2 * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
      3 *
      4 * This file is dual-licensed: you can use it either under the terms
      5 * of the GPL or the X11 license, at your option. Note that this dual
      6 * licensing only applies to this file, and not this project as a
      7 * whole.
      8 *
      9 *  a) This file is free software; you can redistribute it and/or
     10 *     modify it under the terms of the GNU General Public License as
     11 *     published by the Free Software Foundation; either version 2 of the
     12 *     License, or (at your option) any later version.
     13 *
     14 *     This file is distributed in the hope that it will be useful,
     15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     17 *     GNU General Public License for more details.
     18 *
     19 * Or, alternatively,
     20 *
     21 *  b) Permission is hereby granted, free of charge, to any person
     22 *     obtaining a copy of this software and associated documentation
     23 *     files (the "Software"), to deal in the Software without
     24 *     restriction, including without limitation the rights to use,
     25 *     copy, modify, merge, publish, distribute, sublicense, and/or
     26 *     sell copies of the Software, and to permit persons to whom the
     27 *     Software is furnished to do so, subject to the following
     28 *     conditions:
     29 *
     30 *     The above copyright notice and this permission notice shall be
     31 *     included in all copies or substantial portions of the Software.
     32 *
     33 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     34 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     35 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     36 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     37 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     38 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     39 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     40 *     OTHER DEALINGS IN THE SOFTWARE.
     41 */
     42
     43#ifndef _DT_BINDINGS_RST_SUN8I_A23_A33_H_
     44#define _DT_BINDINGS_RST_SUN8I_A23_A33_H_
     45
     46#define RST_USB_PHY0		0
     47#define RST_USB_PHY1		1
     48#define RST_USB_HSIC		2
     49#define RST_MBUS		3
     50#define RST_BUS_MIPI_DSI	4
     51#define RST_BUS_SS		5
     52#define RST_BUS_DMA		6
     53#define RST_BUS_MMC0		7
     54#define RST_BUS_MMC1		8
     55#define RST_BUS_MMC2		9
     56#define RST_BUS_NAND		10
     57#define RST_BUS_DRAM		11
     58#define RST_BUS_HSTIMER		12
     59#define RST_BUS_SPI0		13
     60#define RST_BUS_SPI1		14
     61#define RST_BUS_OTG		15
     62#define RST_BUS_EHCI		16
     63#define RST_BUS_OHCI		17
     64#define RST_BUS_VE		18
     65#define RST_BUS_LCD		19
     66#define RST_BUS_CSI		20
     67#define RST_BUS_DE_BE		21
     68#define RST_BUS_DE_FE		22
     69#define RST_BUS_GPU		23
     70#define RST_BUS_MSGBOX		24
     71#define RST_BUS_SPINLOCK	25
     72#define RST_BUS_DRC		26
     73#define RST_BUS_SAT		27
     74#define RST_BUS_LVDS		28
     75#define RST_BUS_CODEC		29
     76#define RST_BUS_I2S0		30
     77#define RST_BUS_I2S1		31
     78#define RST_BUS_I2C0		32
     79#define RST_BUS_I2C1		33
     80#define RST_BUS_I2C2		34
     81#define RST_BUS_UART0		35
     82#define RST_BUS_UART1		36
     83#define RST_BUS_UART2		37
     84#define RST_BUS_UART3		38
     85#define RST_BUS_UART4		39
     86
     87#endif /* _DT_BINDINGS_RST_SUN8I_A23_A33_H_ */