cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ath9k_platform.h (1477B)


      1/*
      2 * Copyright (c) 2008 Atheros Communications Inc.
      3 * Copyright (c) 2009 Gabor Juhos <juhosg@openwrt.org>
      4 * Copyright (c) 2009 Imre Kaloz <kaloz@openwrt.org>
      5 *
      6 * Permission to use, copy, modify, and/or distribute this software for any
      7 * purpose with or without fee is hereby granted, provided that the above
      8 * copyright notice and this permission notice appear in all copies.
      9 *
     10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     17 */
     18
     19#ifndef _LINUX_ATH9K_PLATFORM_H
     20#define _LINUX_ATH9K_PLATFORM_H
     21
     22#define ATH9K_PLAT_EEP_MAX_WORDS	2048
     23
     24struct ath9k_platform_data {
     25	const char *eeprom_name;
     26
     27	u16 eeprom_data[ATH9K_PLAT_EEP_MAX_WORDS];
     28	u8 *macaddr;
     29
     30	int led_pin;
     31	u32 gpio_mask;
     32	u32 gpio_val;
     33
     34	u32 bt_active_pin;
     35	u32 bt_priority_pin;
     36	u32 wlan_active_pin;
     37
     38	bool endian_check;
     39	bool is_clk_25mhz;
     40	bool tx_gain_buffalo;
     41	bool disable_2ghz;
     42	bool disable_5ghz;
     43	bool led_active_high;
     44
     45	int (*get_mac_revision)(void);
     46	int (*external_reset)(void);
     47
     48	bool use_eeprom;
     49};
     50
     51#endif /* _LINUX_ATH9K_PLATFORM_H */