cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mxs-dma.h (798B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef _MXS_DMA_H_
      3#define _MXS_DMA_H_
      4
      5#include <linux/dmaengine.h>
      6
      7#define MXS_DMA_CTRL_WAIT4END	BIT(31)
      8#define MXS_DMA_CTRL_WAIT4RDY	BIT(30)
      9
     10/*
     11 * The mxs dmaengine can do PIO transfers. We pass a pointer to the PIO words
     12 * in the second argument to dmaengine_prep_slave_sg when the direction is
     13 * set to DMA_TRANS_NONE. To make this clear and to prevent users from doing
     14 * the error prone casting we have this wrapper function
     15 */
     16static inline struct dma_async_tx_descriptor *mxs_dmaengine_prep_pio(
     17        struct dma_chan *chan, u32 *pio, unsigned int npio,
     18        enum dma_transfer_direction dir, unsigned long flags)
     19{
     20	return dmaengine_prep_slave_sg(chan, (struct scatterlist *)pio, npio,
     21				       dir, flags);
     22}
     23
     24#endif /* _MXS_DMA_H_ */