cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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eeprom_93xx46.h (1062B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Module: eeprom_93xx46
      4 * platform description for 93xx46 EEPROMs.
      5 */
      6#include <linux/gpio/consumer.h>
      7
      8struct eeprom_93xx46_platform_data {
      9	unsigned char	flags;
     10#define EE_ADDR8	0x01		/*  8 bit addr. cfg */
     11#define EE_ADDR16	0x02		/* 16 bit addr. cfg */
     12#define EE_READONLY	0x08		/* forbid writing */
     13#define EE_SIZE1K	0x10		/* 1 kb of data, that is a 93xx46 */
     14#define EE_SIZE2K	0x20		/* 2 kb of data, that is a 93xx56 */
     15#define EE_SIZE4K	0x40		/* 4 kb of data, that is a 93xx66 */
     16
     17	unsigned int	quirks;
     18/* Single word read transfers only; no sequential read. */
     19#define EEPROM_93XX46_QUIRK_SINGLE_WORD_READ		(1 << 0)
     20/* Instructions such as EWEN are (addrlen + 2) in length. */
     21#define EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH		(1 << 1)
     22/* Add extra cycle after address during a read */
     23#define EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE		BIT(2)
     24
     25	/*
     26	 * optional hooks to control additional logic
     27	 * before and after spi transfer.
     28	 */
     29	void (*prepare)(void *);
     30	void (*finish)(void *);
     31	struct gpio_desc *select;
     32};