cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
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stratix10-smc.h (12115B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Copyright (C) 2017-2018, Intel Corporation
      4 */
      5
      6#ifndef __STRATIX10_SMC_H
      7#define __STRATIX10_SMC_H
      8
      9#include <linux/arm-smccc.h>
     10#include <linux/bitops.h>
     11
     12/**
     13 * This file defines the Secure Monitor Call (SMC) message protocol used for
     14 * service layer driver in normal world (EL1) to communicate with secure
     15 * monitor software in Secure Monitor Exception Level 3 (EL3).
     16 *
     17 * This file is shared with secure firmware (FW) which is out of kernel tree.
     18 *
     19 * An ARM SMC instruction takes a function identifier and up to 6 64-bit
     20 * register values as arguments, and can return up to 4 64-bit register
     21 * value. The operation of the secure monitor is determined by the parameter
     22 * values passed in through registers.
     23 *
     24 * EL1 and EL3 communicates pointer as physical address rather than the
     25 * virtual address.
     26 *
     27 * Functions specified by ARM SMC Calling convention:
     28 *
     29 * FAST call executes atomic operations, returns when the requested operation
     30 * has completed.
     31 * STD call starts a operation which can be preempted by a non-secure
     32 * interrupt. The call can return before the requested operation has
     33 * completed.
     34 *
     35 * a0..a7 is used as register names in the descriptions below, on arm32
     36 * that translates to r0..r7 and on arm64 to w0..w7.
     37 */
     38
     39/**
     40 * @func_num: function ID
     41 */
     42#define INTEL_SIP_SMC_STD_CALL_VAL(func_num) \
     43	ARM_SMCCC_CALL_VAL(ARM_SMCCC_STD_CALL, ARM_SMCCC_SMC_64, \
     44	ARM_SMCCC_OWNER_SIP, (func_num))
     45
     46#define INTEL_SIP_SMC_FAST_CALL_VAL(func_num) \
     47	ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, ARM_SMCCC_SMC_64, \
     48	ARM_SMCCC_OWNER_SIP, (func_num))
     49
     50/**
     51 * Return values in INTEL_SIP_SMC_* call
     52 *
     53 * INTEL_SIP_SMC_RETURN_UNKNOWN_FUNCTION:
     54 * Secure monitor software doesn't recognize the request.
     55 *
     56 * INTEL_SIP_SMC_STATUS_OK:
     57 * Secure monitor software accepts the service client's request.
     58 *
     59 * INTEL_SIP_SMC_STATUS_BUSY:
     60 * Secure monitor software is still processing service client's request.
     61 *
     62 * INTEL_SIP_SMC_STATUS_REJECTED:
     63 * Secure monitor software reject the service client's request.
     64 *
     65 * INTEL_SIP_SMC_STATUS_ERROR:
     66 * There is error during the process of service request.
     67 *
     68 * INTEL_SIP_SMC_RSU_ERROR:
     69 * There is error during the process of remote status update request.
     70 */
     71#define INTEL_SIP_SMC_RETURN_UNKNOWN_FUNCTION		0xFFFFFFFF
     72#define INTEL_SIP_SMC_STATUS_OK				0x0
     73#define INTEL_SIP_SMC_STATUS_BUSY			0x1
     74#define INTEL_SIP_SMC_STATUS_REJECTED			0x2
     75#define INTEL_SIP_SMC_STATUS_ERROR			0x4
     76#define INTEL_SIP_SMC_RSU_ERROR				0x7
     77
     78/**
     79 * Request INTEL_SIP_SMC_FPGA_CONFIG_START
     80 *
     81 * Sync call used by service driver at EL1 to request the FPGA in EL3 to
     82 * be prepare to receive a new configuration.
     83 *
     84 * Call register usage:
     85 * a0: INTEL_SIP_SMC_FPGA_CONFIG_START.
     86 * a1: flag for full or partial configuration. 0 for full and 1 for partial
     87 * configuration.
     88 * a2-7: not used.
     89 *
     90 * Return status:
     91 * a0: INTEL_SIP_SMC_STATUS_OK, or INTEL_SIP_SMC_STATUS_ERROR.
     92 * a1-3: not used.
     93 */
     94#define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_START 1
     95#define INTEL_SIP_SMC_FPGA_CONFIG_START \
     96	INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_START)
     97
     98/**
     99 * Request INTEL_SIP_SMC_FPGA_CONFIG_WRITE
    100 *
    101 * Async call used by service driver at EL1 to provide FPGA configuration data
    102 * to secure world.
    103 *
    104 * Call register usage:
    105 * a0: INTEL_SIP_SMC_FPGA_CONFIG_WRITE.
    106 * a1: 64bit physical address of the configuration data memory block
    107 * a2: Size of configuration data block.
    108 * a3-7: not used.
    109 *
    110 * Return status:
    111 * a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_BUSY or
    112 * INTEL_SIP_SMC_STATUS_ERROR.
    113 * a1: 64bit physical address of 1st completed memory block if any completed
    114 * block, otherwise zero value.
    115 * a2: 64bit physical address of 2nd completed memory block if any completed
    116 * block, otherwise zero value.
    117 * a3: 64bit physical address of 3rd completed memory block if any completed
    118 * block, otherwise zero value.
    119 */
    120#define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_WRITE 2
    121#define INTEL_SIP_SMC_FPGA_CONFIG_WRITE \
    122	INTEL_SIP_SMC_STD_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_WRITE)
    123
    124/**
    125 * Request INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE
    126 *
    127 * Sync call used by service driver at EL1 to track the completed write
    128 * transactions. This request is called after INTEL_SIP_SMC_FPGA_CONFIG_WRITE
    129 * call returns INTEL_SIP_SMC_STATUS_BUSY.
    130 *
    131 * Call register usage:
    132 * a0: INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE.
    133 * a1-7: not used.
    134 *
    135 * Return status:
    136 * a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_FPGA_BUSY or
    137 * INTEL_SIP_SMC_STATUS_ERROR.
    138 * a1: 64bit physical address of 1st completed memory block.
    139 * a2: 64bit physical address of 2nd completed memory block if
    140 * any completed block, otherwise zero value.
    141 * a3: 64bit physical address of 3rd completed memory block if
    142 * any completed block, otherwise zero value.
    143 */
    144#define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE 3
    145#define INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE \
    146INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
    147
    148/**
    149 * Request INTEL_SIP_SMC_FPGA_CONFIG_ISDONE
    150 *
    151 * Sync call used by service driver at EL1 to inform secure world that all
    152 * data are sent, to check whether or not the secure world had completed
    153 * the FPGA configuration process.
    154 *
    155 * Call register usage:
    156 * a0: INTEL_SIP_SMC_FPGA_CONFIG_ISDONE.
    157 * a1-7: not used.
    158 *
    159 * Return status:
    160 * a0: INTEL_SIP_SMC_STATUS_OK, INTEL_SIP_SMC_STATUS_BUSY or
    161 * INTEL_SIP_SMC_STATUS_ERROR.
    162 * a1-3: not used.
    163 */
    164#define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_ISDONE 4
    165#define INTEL_SIP_SMC_FPGA_CONFIG_ISDONE \
    166	INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_ISDONE)
    167
    168/**
    169 * Request INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM
    170 *
    171 * Sync call used by service driver at EL1 to query the physical address of
    172 * memory block reserved by secure monitor software.
    173 *
    174 * Call register usage:
    175 * a0:INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM.
    176 * a1-7: not used.
    177 *
    178 * Return status:
    179 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_STATUS_ERROR.
    180 * a1: start of physical address of reserved memory block.
    181 * a2: size of reserved memory block.
    182 * a3: not used.
    183 */
    184#define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_GET_MEM 5
    185#define INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM \
    186	INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_GET_MEM)
    187
    188/**
    189 * Request INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK
    190 *
    191 * For SMC loop-back mode only, used for internal integration, debugging
    192 * or troubleshooting.
    193 *
    194 * Call register usage:
    195 * a0: INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK.
    196 * a1-7: not used.
    197 *
    198 * Return status:
    199 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_STATUS_ERROR.
    200 * a1-3: not used.
    201 */
    202#define INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_LOOPBACK 6
    203#define INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK \
    204	INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_LOOPBACK)
    205
    206/**
    207 * Request INTEL_SIP_SMC_REG_READ
    208 *
    209 * Read a protected register at EL3
    210 *
    211 * Call register usage:
    212 * a0: INTEL_SIP_SMC_REG_READ.
    213 * a1: register address.
    214 * a2-7: not used.
    215 *
    216 * Return status:
    217 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR.
    218 * a1: value in the register
    219 * a2-3: not used.
    220 */
    221#define INTEL_SIP_SMC_FUNCID_REG_READ 7
    222#define INTEL_SIP_SMC_REG_READ \
    223	INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_READ)
    224
    225/**
    226 * Request INTEL_SIP_SMC_REG_WRITE
    227 *
    228 * Write a protected register at EL3
    229 *
    230 * Call register usage:
    231 * a0: INTEL_SIP_SMC_REG_WRITE.
    232 * a1: register address
    233 * a2: value to program into register.
    234 * a3-7: not used.
    235 *
    236 * Return status:
    237 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR.
    238 * a1-3: not used.
    239 */
    240#define INTEL_SIP_SMC_FUNCID_REG_WRITE 8
    241#define INTEL_SIP_SMC_REG_WRITE \
    242	INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_WRITE)
    243
    244/**
    245 * Request INTEL_SIP_SMC_FUNCID_REG_UPDATE
    246 *
    247 * Update one or more bits in a protected register at EL3 using a
    248 * read-modify-write operation.
    249 *
    250 * Call register usage:
    251 * a0: INTEL_SIP_SMC_REG_UPDATE.
    252 * a1: register address
    253 * a2: write Mask.
    254 * a3: value to write.
    255 * a4-7: not used.
    256 *
    257 * Return status:
    258 * a0: INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_REG_ERROR.
    259 * a1-3: Not used.
    260 */
    261#define INTEL_SIP_SMC_FUNCID_REG_UPDATE 9
    262#define INTEL_SIP_SMC_REG_UPDATE \
    263	INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_UPDATE)
    264
    265/**
    266 * Request INTEL_SIP_SMC_RSU_STATUS
    267 *
    268 * Request remote status update boot log, call is synchronous.
    269 *
    270 * Call register usage:
    271 * a0 INTEL_SIP_SMC_RSU_STATUS
    272 * a1-7 not used
    273 *
    274 * Return status
    275 * a0: Current Image
    276 * a1: Last Failing Image
    277 * a2: Version | State
    278 * a3: Error details | Error location
    279 *
    280 * Or
    281 *
    282 * a0: INTEL_SIP_SMC_RSU_ERROR
    283 */
    284#define INTEL_SIP_SMC_FUNCID_RSU_STATUS 11
    285#define INTEL_SIP_SMC_RSU_STATUS \
    286	INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_STATUS)
    287
    288/**
    289 * Request INTEL_SIP_SMC_RSU_UPDATE
    290 *
    291 * Request to set the offset of the bitstream to boot after reboot, call
    292 * is synchronous.
    293 *
    294 * Call register usage:
    295 * a0 INTEL_SIP_SMC_RSU_UPDATE
    296 * a1 64bit physical address of the configuration data memory in flash
    297 * a2-7 not used
    298 *
    299 * Return status
    300 * a0 INTEL_SIP_SMC_STATUS_OK
    301 */
    302#define INTEL_SIP_SMC_FUNCID_RSU_UPDATE 12
    303#define INTEL_SIP_SMC_RSU_UPDATE \
    304	INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_UPDATE)
    305
    306/**
    307 * Request INTEL_SIP_SMC_ECC_DBE
    308 *
    309 * Sync call used by service driver at EL1 to alert EL3 that a Double
    310 * Bit ECC error has occurred.
    311 *
    312 * Call register usage:
    313 * a0 INTEL_SIP_SMC_ECC_DBE
    314 * a1 SysManager Double Bit Error value
    315 * a2-7 not used
    316 *
    317 * Return status
    318 * a0 INTEL_SIP_SMC_STATUS_OK
    319 */
    320#define INTEL_SIP_SMC_FUNCID_ECC_DBE 13
    321#define INTEL_SIP_SMC_ECC_DBE \
    322	INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_ECC_DBE)
    323
    324/**
    325 * Request INTEL_SIP_SMC_RSU_NOTIFY
    326 *
    327 * Sync call used by service driver at EL1 to report hard processor
    328 * system execution stage to firmware
    329 *
    330 * Call register usage:
    331 * a0 INTEL_SIP_SMC_RSU_NOTIFY
    332 * a1 32bit value representing hard processor system execution stage
    333 * a2-7 not used
    334 *
    335 * Return status
    336 * a0 INTEL_SIP_SMC_STATUS_OK
    337 */
    338#define INTEL_SIP_SMC_FUNCID_RSU_NOTIFY 14
    339#define INTEL_SIP_SMC_RSU_NOTIFY \
    340	INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_NOTIFY)
    341
    342/**
    343 * Request INTEL_SIP_SMC_RSU_RETRY_COUNTER
    344 *
    345 * Sync call used by service driver at EL1 to query RSU retry counter
    346 *
    347 * Call register usage:
    348 * a0 INTEL_SIP_SMC_RSU_RETRY_COUNTER
    349 * a1-7 not used
    350 *
    351 * Return status
    352 * a0 INTEL_SIP_SMC_STATUS_OK
    353 * a1 the retry counter
    354 *
    355 * Or
    356 *
    357 * a0 INTEL_SIP_SMC_RSU_ERROR
    358 */
    359#define INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER 15
    360#define INTEL_SIP_SMC_RSU_RETRY_COUNTER \
    361	INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER)
    362
    363/**
    364 * Request INTEL_SIP_SMC_RSU_DCMF_VERSION
    365 *
    366 * Sync call used by service driver at EL1 to query DCMF (Decision
    367 * Configuration Management Firmware) version from FW
    368 *
    369 * Call register usage:
    370 * a0 INTEL_SIP_SMC_RSU_DCMF_VERSION
    371 * a1-7 not used
    372 *
    373 * Return status
    374 * a0 INTEL_SIP_SMC_STATUS_OK
    375 * a1 dcmf1 | dcmf0
    376 * a2 dcmf3 | dcmf2
    377 *
    378 * Or
    379 *
    380 * a0 INTEL_SIP_SMC_RSU_ERROR
    381 */
    382#define INTEL_SIP_SMC_FUNCID_RSU_DCMF_VERSION 16
    383#define INTEL_SIP_SMC_RSU_DCMF_VERSION \
    384	INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_DCMF_VERSION)
    385
    386/**
    387 * Request INTEL_SIP_SMC_RSU_MAX_RETRY
    388 *
    389 * Sync call used by service driver at EL1 to query max retry value from FW
    390 *
    391 * Call register usage:
    392 * a0 INTEL_SIP_SMC_RSU_MAX_RETRY
    393 * a1-7 not used
    394 *
    395 * Return status
    396 * a0 INTEL_SIP_SMC_STATUS_OK
    397 * a1 max retry value
    398 *
    399 * Or
    400 * a0 INTEL_SIP_SMC_RSU_ERROR
    401 */
    402#define INTEL_SIP_SMC_FUNCID_RSU_MAX_RETRY 18
    403#define INTEL_SIP_SMC_RSU_MAX_RETRY \
    404	INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_MAX_RETRY)
    405
    406/**
    407 * Request INTEL_SIP_SMC_FIRMWARE_VERSION
    408 *
    409 * Sync call used to query the version of running firmware
    410 *
    411 * Call register usage:
    412 * a0 INTEL_SIP_SMC_FIRMWARE_VERSION
    413 * a1-a7 not used
    414 *
    415 * Return status:
    416 * a0 INTEL_SIP_SMC_STATUS_OK or INTEL_SIP_SMC_STATUS_ERROR
    417 * a1 running firmware version
    418 */
    419#define INTEL_SIP_SMC_FUNCID_FIRMWARE_VERSION 31
    420#define INTEL_SIP_SMC_FIRMWARE_VERSION \
    421        INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FIRMWARE_VERSION)
    422
    423#endif