cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fpga-region.h (2140B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2
      3#ifndef _FPGA_REGION_H
      4#define _FPGA_REGION_H
      5
      6#include <linux/device.h>
      7#include <linux/fpga/fpga-mgr.h>
      8#include <linux/fpga/fpga-bridge.h>
      9
     10struct fpga_region;
     11
     12/**
     13 * struct fpga_region_info - collection of parameters an FPGA Region
     14 * @mgr: fpga region manager
     15 * @compat_id: FPGA region id for compatibility check.
     16 * @priv: fpga region private data
     17 * @get_bridges: optional function to get bridges to a list
     18 *
     19 * fpga_region_info contains parameters for the register_full function.
     20 * These are separated into an info structure because they some are optional
     21 * others could be added to in the future. The info structure facilitates
     22 * maintaining a stable API.
     23 */
     24struct fpga_region_info {
     25	struct fpga_manager *mgr;
     26	struct fpga_compat_id *compat_id;
     27	void *priv;
     28	int (*get_bridges)(struct fpga_region *region);
     29};
     30
     31/**
     32 * struct fpga_region - FPGA Region structure
     33 * @dev: FPGA Region device
     34 * @mutex: enforces exclusive reference to region
     35 * @bridge_list: list of FPGA bridges specified in region
     36 * @mgr: FPGA manager
     37 * @info: FPGA image info
     38 * @compat_id: FPGA region id for compatibility check.
     39 * @priv: private data
     40 * @get_bridges: optional function to get bridges to a list
     41 */
     42struct fpga_region {
     43	struct device dev;
     44	struct mutex mutex; /* for exclusive reference to region */
     45	struct list_head bridge_list;
     46	struct fpga_manager *mgr;
     47	struct fpga_image_info *info;
     48	struct fpga_compat_id *compat_id;
     49	void *priv;
     50	int (*get_bridges)(struct fpga_region *region);
     51};
     52
     53#define to_fpga_region(d) container_of(d, struct fpga_region, dev)
     54
     55struct fpga_region *
     56fpga_region_class_find(struct device *start, const void *data,
     57		       int (*match)(struct device *, const void *));
     58
     59int fpga_region_program_fpga(struct fpga_region *region);
     60
     61struct fpga_region *
     62fpga_region_register_full(struct device *parent, const struct fpga_region_info *info);
     63
     64struct fpga_region *
     65fpga_region_register(struct device *parent, struct fpga_manager *mgr,
     66		     int (*get_bridges)(struct fpga_region *));
     67void fpga_region_unregister(struct fpga_region *region);
     68
     69#endif /* _FPGA_REGION_H */