cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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i2c-algo-pca.h (2956B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef _LINUX_I2C_ALGO_PCA_H
      3#define _LINUX_I2C_ALGO_PCA_H
      4
      5/* Chips known to the pca algo */
      6#define I2C_PCA_CHIP_9564	0x00
      7#define I2C_PCA_CHIP_9665	0x01
      8
      9/* Internal period for PCA9665 oscilator */
     10#define I2C_PCA_OSC_PER		3 /* e10-8s */
     11
     12/* Clock speeds for the bus for PCA9564*/
     13#define I2C_PCA_CON_330kHz	0x00
     14#define I2C_PCA_CON_288kHz	0x01
     15#define I2C_PCA_CON_217kHz	0x02
     16#define I2C_PCA_CON_146kHz	0x03
     17#define I2C_PCA_CON_88kHz	0x04
     18#define I2C_PCA_CON_59kHz	0x05
     19#define I2C_PCA_CON_44kHz	0x06
     20#define I2C_PCA_CON_36kHz	0x07
     21
     22/* PCA9564 registers */
     23#define I2C_PCA_STA		0x00 /* STATUS  Read Only  */
     24#define I2C_PCA_TO		0x00 /* TIMEOUT Write Only */
     25#define I2C_PCA_DAT		0x01 /* DATA    Read/Write */
     26#define I2C_PCA_ADR		0x02 /* OWN ADR Read/Write */
     27#define I2C_PCA_CON		0x03 /* CONTROL Read/Write */
     28
     29/* PCA9665 registers */
     30#define I2C_PCA_INDPTR          0x00 /* INDIRECT Pointer Write Only */
     31#define I2C_PCA_IND             0x02 /* INDIRECT Read/Write */
     32
     33/* PCA9665 indirect registers */
     34#define I2C_PCA_ICOUNT          0x00 /* Byte Count for buffered mode */
     35#define I2C_PCA_IADR            0x01 /* OWN ADR */
     36#define I2C_PCA_ISCLL           0x02 /* SCL LOW period */
     37#define I2C_PCA_ISCLH           0x03 /* SCL HIGH period */
     38#define I2C_PCA_ITO             0x04 /* TIMEOUT */
     39#define I2C_PCA_IPRESET         0x05 /* Parallel bus reset */
     40#define I2C_PCA_IMODE           0x06 /* I2C Bus mode */
     41
     42/* PCA9665 I2C bus mode */
     43#define I2C_PCA_MODE_STD        0x00 /* Standard mode */
     44#define I2C_PCA_MODE_FAST       0x01 /* Fast mode */
     45#define I2C_PCA_MODE_FASTP      0x02 /* Fast Plus mode */
     46#define I2C_PCA_MODE_TURBO      0x03 /* Turbo mode */
     47
     48
     49#define I2C_PCA_CON_AA		0x80 /* Assert Acknowledge */
     50#define I2C_PCA_CON_ENSIO	0x40 /* Enable */
     51#define I2C_PCA_CON_STA		0x20 /* Start */
     52#define I2C_PCA_CON_STO		0x10 /* Stop */
     53#define I2C_PCA_CON_SI		0x08 /* Serial Interrupt */
     54#define I2C_PCA_CON_CR		0x07 /* Clock Rate (MASK) */
     55
     56/**
     57 * struct pca_i2c_bus_settings - The configured PCA i2c bus settings
     58 * @mode: Configured i2c bus mode
     59 * @tlow: Configured SCL LOW period
     60 * @thi: Configured SCL HIGH period
     61 * @clock_freq: The configured clock frequency
     62 */
     63struct pca_i2c_bus_settings {
     64	int mode;
     65	int tlow;
     66	int thi;
     67	int clock_freq;
     68};
     69
     70struct i2c_algo_pca_data {
     71	void 				*data;	/* private low level data */
     72	void (*write_byte)		(void *data, int reg, int val);
     73	int  (*read_byte)		(void *data, int reg);
     74	int  (*wait_for_completion)	(void *data);
     75	void (*reset_chip)		(void *data);
     76	/* For PCA9564, use one of the predefined frequencies:
     77	 * 330000, 288000, 217000, 146000, 88000, 59000, 44000, 36000
     78	 * For PCA9665, use the frequency you want here. */
     79	unsigned int			i2c_clock;
     80	unsigned int			chip;
     81	struct pca_i2c_bus_settings		bus_settings;
     82};
     83
     84int i2c_pca_add_bus(struct i2c_adapter *);
     85int i2c_pca_add_numbered_bus(struct i2c_adapter *);
     86
     87#endif /* _LINUX_I2C_ALGO_PCA_H */