cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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chained_irq.h (931B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Chained IRQ handlers support.
      4 *
      5 * Copyright (C) 2011 ARM Ltd.
      6 */
      7#ifndef __IRQCHIP_CHAINED_IRQ_H
      8#define __IRQCHIP_CHAINED_IRQ_H
      9
     10#include <linux/irq.h>
     11
     12/*
     13 * Entry/exit functions for chained handlers where the primary IRQ chip
     14 * may implement either fasteoi or level-trigger flow control.
     15 */
     16static inline void chained_irq_enter(struct irq_chip *chip,
     17				     struct irq_desc *desc)
     18{
     19	/* FastEOI controllers require no action on entry. */
     20	if (chip->irq_eoi)
     21		return;
     22
     23	if (chip->irq_mask_ack) {
     24		chip->irq_mask_ack(&desc->irq_data);
     25	} else {
     26		chip->irq_mask(&desc->irq_data);
     27		if (chip->irq_ack)
     28			chip->irq_ack(&desc->irq_data);
     29	}
     30}
     31
     32static inline void chained_irq_exit(struct irq_chip *chip,
     33				    struct irq_desc *desc)
     34{
     35	if (chip->irq_eoi)
     36		chip->irq_eoi(&desc->irq_data);
     37	else
     38		chip->irq_unmask(&desc->irq_data);
     39}
     40
     41#endif /* __IRQCHIP_CHAINED_IRQ_H */