cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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litex.h (2107B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Common LiteX header providing
      4 * helper functions for accessing CSRs.
      5 *
      6 * Copyright (C) 2019-2020 Antmicro <www.antmicro.com>
      7 */
      8
      9#ifndef _LINUX_LITEX_H
     10#define _LINUX_LITEX_H
     11
     12#include <linux/io.h>
     13
     14static inline void _write_litex_subregister(u32 val, void __iomem *addr)
     15{
     16	writel((u32 __force)cpu_to_le32(val), addr);
     17}
     18
     19static inline u32 _read_litex_subregister(void __iomem *addr)
     20{
     21	return le32_to_cpu((__le32 __force)readl(addr));
     22}
     23
     24/*
     25 * LiteX SoC Generator, depending on the configuration, can split a single
     26 * logical CSR (Control&Status Register) into a series of consecutive physical
     27 * registers.
     28 *
     29 * For example, in the configuration with 8-bit CSR Bus, a 32-bit aligned,
     30 * 32-bit wide logical CSR will be laid out as four 32-bit physical
     31 * subregisters, each one containing one byte of meaningful data.
     32 *
     33 * For Linux support, upstream LiteX enforces a 32-bit wide CSR bus, which
     34 * means that only larger-than-32-bit CSRs will be split across multiple
     35 * subregisters (e.g., a 64-bit CSR will be spread across two consecutive
     36 * 32-bit subregisters).
     37 *
     38 * For details see: https://github.com/enjoy-digital/litex/wiki/CSR-Bus
     39 */
     40
     41static inline void litex_write8(void __iomem *reg, u8 val)
     42{
     43	_write_litex_subregister(val, reg);
     44}
     45
     46static inline void litex_write16(void __iomem *reg, u16 val)
     47{
     48	_write_litex_subregister(val, reg);
     49}
     50
     51static inline void litex_write32(void __iomem *reg, u32 val)
     52{
     53	_write_litex_subregister(val, reg);
     54}
     55
     56static inline void litex_write64(void __iomem *reg, u64 val)
     57{
     58	_write_litex_subregister(val >> 32, reg);
     59	_write_litex_subregister(val, reg + 4);
     60}
     61
     62static inline u8 litex_read8(void __iomem *reg)
     63{
     64	return _read_litex_subregister(reg);
     65}
     66
     67static inline u16 litex_read16(void __iomem *reg)
     68{
     69	return _read_litex_subregister(reg);
     70}
     71
     72static inline u32 litex_read32(void __iomem *reg)
     73{
     74	return _read_litex_subregister(reg);
     75}
     76
     77static inline u64 litex_read64(void __iomem *reg)
     78{
     79	return ((u64)_read_litex_subregister(reg) << 32) |
     80		_read_litex_subregister(reg + 4);
     81}
     82
     83#endif /* _LINUX_LITEX_H */