cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mc6821.h (1209B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef _MC6821_H_
      3#define _MC6821_H_
      4
      5/*
      6 * This file describes the memery mapping of the MC6821 PIA.
      7 * The unions describe overlayed registers. Which of them is used is
      8 * determined by bit 2 of the corresponding control register.
      9 * this files expects the PIA_REG_PADWIDTH to be defined the numeric
     10 * value of the register spacing.
     11 *
     12 * Data came from MFC-31-Developer Kit (from Ralph Seidel,
     13 * zodiac@darkness.gun.de) and Motorola Data Sheet (from 
     14 * Richard Hirst, srh@gpt.co.uk)
     15 *
     16 * 6.11.95 copyright Joerg Dorchain (dorchain@mpi-sb.mpg.de)
     17 *
     18 */
     19
     20#ifndef PIA_REG_PADWIDTH
     21#define PIA_REG_PADWIDTH 255
     22#endif
     23
     24struct pia {
     25	union {
     26		volatile u_char pra;
     27		volatile u_char ddra;
     28	} ua;
     29	u_char pad1[PIA_REG_PADWIDTH];
     30	volatile u_char cra;
     31	u_char pad2[PIA_REG_PADWIDTH];
     32	union {
     33		volatile u_char prb;
     34		volatile u_char ddrb;
     35	} ub;
     36	u_char pad3[PIA_REG_PADWIDTH];
     37	volatile u_char crb;
     38	u_char pad4[PIA_REG_PADWIDTH];
     39};
     40
     41#define ppra ua.pra
     42#define pddra ua.ddra
     43#define pprb ub.prb
     44#define pddrb ub.ddrb
     45
     46#define PIA_C1_ENABLE_IRQ (1<<0)
     47#define PIA_C1_LOW_TO_HIGH (1<<1)
     48#define PIA_DDR (1<<2)
     49#define PIA_IRQ2 (1<<6)
     50#define PIA_IRQ1 (1<<7)
     51
     52#endif