cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

intel_soc_pmic.h (1878B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Intel SoC PMIC Driver
      4 *
      5 * Copyright (C) 2012-2014 Intel Corporation. All rights reserved.
      6 *
      7 * Author: Yang, Bin <bin.yang@intel.com>
      8 * Author: Zhu, Lejun <lejun.zhu@linux.intel.com>
      9 */
     10
     11#ifndef __INTEL_SOC_PMIC_H__
     12#define __INTEL_SOC_PMIC_H__
     13
     14#include <linux/regmap.h>
     15
     16enum intel_cht_wc_models {
     17	INTEL_CHT_WC_UNKNOWN,
     18	INTEL_CHT_WC_GPD_WIN_POCKET,
     19	INTEL_CHT_WC_XIAOMI_MIPAD2,
     20	INTEL_CHT_WC_LENOVO_YOGABOOK1,
     21};
     22
     23/**
     24 * struct intel_soc_pmic - Intel SoC PMIC data
     25 * @irq: Master interrupt number of the parent PMIC device
     26 * @regmap: Pointer to the parent PMIC device regmap structure
     27 * @irq_chip_data: IRQ chip data for the PMIC itself
     28 * @irq_chip_data_pwrbtn: Chained IRQ chip data for the Power Button
     29 * @irq_chip_data_tmu: Chained IRQ chip data for the Time Management Unit
     30 * @irq_chip_data_bcu: Chained IRQ chip data for the Burst Control Unit
     31 * @irq_chip_data_adc: Chained IRQ chip data for the General Purpose ADC
     32 * @irq_chip_data_chgr: Chained IRQ chip data for the External Charger
     33 * @irq_chip_data_crit: Chained IRQ chip data for the Critical Event Handler
     34 * @dev: Pointer to the parent PMIC device
     35 * @scu: Pointer to the SCU IPC device data structure
     36 */
     37struct intel_soc_pmic {
     38	int irq;
     39	struct regmap *regmap;
     40	struct regmap_irq_chip_data *irq_chip_data;
     41	struct regmap_irq_chip_data *irq_chip_data_pwrbtn;
     42	struct regmap_irq_chip_data *irq_chip_data_tmu;
     43	struct regmap_irq_chip_data *irq_chip_data_bcu;
     44	struct regmap_irq_chip_data *irq_chip_data_adc;
     45	struct regmap_irq_chip_data *irq_chip_data_chgr;
     46	struct regmap_irq_chip_data *irq_chip_data_crit;
     47	struct device *dev;
     48	struct intel_scu_ipc_dev *scu;
     49	enum intel_cht_wc_models cht_wc_model;
     50};
     51
     52int intel_soc_pmic_exec_mipi_pmic_seq_element(u16 i2c_address, u32 reg_address,
     53					      u32 value, u32 mask);
     54
     55#endif	/* __INTEL_SOC_PMIC_H__ */