cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ntxec.h (904B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Copyright 2020 Jonathan Neuschäfer
      4 *
      5 * Register access and version information for the Netronix embedded
      6 * controller.
      7 */
      8
      9#ifndef NTXEC_H
     10#define NTXEC_H
     11
     12#include <linux/types.h>
     13
     14struct device;
     15struct regmap;
     16
     17struct ntxec {
     18	struct device *dev;
     19	struct regmap *regmap;
     20};
     21
     22/*
     23 * Some registers, such as the battery status register (0x41), are in
     24 * big-endian, but others only have eight significant bits, which are in the
     25 * first byte transmitted over I2C (the MSB of the big-endian value).
     26 * This convenience function converts an 8-bit value to 16-bit for use in the
     27 * second kind of register.
     28 */
     29static inline u16 ntxec_reg8(u8 value)
     30{
     31	return value << 8;
     32}
     33
     34/* Known firmware versions */
     35#define NTXEC_VERSION_KOBO_AURA	0xd726	/* found in Kobo Aura */
     36#define NTXEC_VERSION_TOLINO_SHINE2 0xf110 /* found in Tolino Shine 2 HD */
     37
     38#endif