rt5033-private.h (7927B)
1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * MFD core driver for Richtek RT5033 4 * 5 * Copyright (C) 2014 Samsung Electronics, Co., Ltd. 6 * Author: Beomho Seo <beomho.seo@samsung.com> 7 */ 8 9#ifndef __RT5033_PRIVATE_H__ 10#define __RT5033_PRIVATE_H__ 11 12enum rt5033_reg { 13 RT5033_REG_CHG_STAT = 0x00, 14 RT5033_REG_CHG_CTRL1 = 0x01, 15 RT5033_REG_CHG_CTRL2 = 0x02, 16 RT5033_REG_DEVICE_ID = 0x03, 17 RT5033_REG_CHG_CTRL3 = 0x04, 18 RT5033_REG_CHG_CTRL4 = 0x05, 19 RT5033_REG_CHG_CTRL5 = 0x06, 20 RT5033_REG_RT_CTRL0 = 0x07, 21 RT5033_REG_CHG_RESET = 0x08, 22 /* Reserved 0x09~0x18 */ 23 RT5033_REG_RT_CTRL1 = 0x19, 24 /* Reserved 0x1A~0x20 */ 25 RT5033_REG_FLED_FUNCTION1 = 0x21, 26 RT5033_REG_FLED_FUNCTION2 = 0x22, 27 RT5033_REG_FLED_STROBE_CTRL1 = 0x23, 28 RT5033_REG_FLED_STROBE_CTRL2 = 0x24, 29 RT5033_REG_FLED_CTRL1 = 0x25, 30 RT5033_REG_FLED_CTRL2 = 0x26, 31 RT5033_REG_FLED_CTRL3 = 0x27, 32 RT5033_REG_FLED_CTRL4 = 0x28, 33 RT5033_REG_FLED_CTRL5 = 0x29, 34 /* Reserved 0x2A~0x40 */ 35 RT5033_REG_CTRL = 0x41, 36 RT5033_REG_BUCK_CTRL = 0x42, 37 RT5033_REG_LDO_CTRL = 0x43, 38 /* Reserved 0x44~0x46 */ 39 RT5033_REG_MANUAL_RESET_CTRL = 0x47, 40 /* Reserved 0x48~0x5F */ 41 RT5033_REG_CHG_IRQ1 = 0x60, 42 RT5033_REG_CHG_IRQ2 = 0x61, 43 RT5033_REG_CHG_IRQ3 = 0x62, 44 RT5033_REG_CHG_IRQ1_CTRL = 0x63, 45 RT5033_REG_CHG_IRQ2_CTRL = 0x64, 46 RT5033_REG_CHG_IRQ3_CTRL = 0x65, 47 RT5033_REG_LED_IRQ_STAT = 0x66, 48 RT5033_REG_LED_IRQ_CTRL = 0x67, 49 RT5033_REG_PMIC_IRQ_STAT = 0x68, 50 RT5033_REG_PMIC_IRQ_CTRL = 0x69, 51 RT5033_REG_SHDN_CTRL = 0x6A, 52 RT5033_REG_OFF_EVENT = 0x6B, 53 54 RT5033_REG_END, 55}; 56 57/* RT5033 Charger state register */ 58#define RT5033_CHG_STAT_MASK 0x20 59#define RT5033_CHG_STAT_DISCHARGING 0x00 60#define RT5033_CHG_STAT_FULL 0x10 61#define RT5033_CHG_STAT_CHARGING 0x20 62#define RT5033_CHG_STAT_NOT_CHARGING 0x30 63#define RT5033_CHG_STAT_TYPE_MASK 0x60 64#define RT5033_CHG_STAT_TYPE_PRE 0x20 65#define RT5033_CHG_STAT_TYPE_FAST 0x60 66 67/* RT5033 CHGCTRL1 register */ 68#define RT5033_CHGCTRL1_IAICR_MASK 0xe0 69#define RT5033_CHGCTRL1_MODE_MASK 0x01 70 71/* RT5033 CHGCTRL2 register */ 72#define RT5033_CHGCTRL2_CV_MASK 0xfc 73 74/* RT5033 CHGCTRL3 register */ 75#define RT5033_CHGCTRL3_CFO_EN_MASK 0x40 76#define RT5033_CHGCTRL3_TIMER_MASK 0x38 77#define RT5033_CHGCTRL3_TIMER_EN_MASK 0x01 78 79/* RT5033 CHGCTRL4 register */ 80#define RT5033_CHGCTRL4_EOC_MASK 0x07 81#define RT5033_CHGCTRL4_IPREC_MASK 0x18 82 83/* RT5033 CHGCTRL5 register */ 84#define RT5033_CHGCTRL5_VPREC_MASK 0x0f 85#define RT5033_CHGCTRL5_ICHG_MASK 0xf0 86#define RT5033_CHGCTRL5_ICHG_SHIFT 0x04 87#define RT5033_CHG_MAX_CURRENT 0x0d 88 89/* RT5033 RT CTRL1 register */ 90#define RT5033_RT_CTRL1_UUG_MASK 0x02 91#define RT5033_RT_HZ_MASK 0x01 92 93/* RT5033 control register */ 94#define RT5033_CTRL_FCCM_BUCK_MASK BIT(0) 95#define RT5033_CTRL_BUCKOMS_MASK BIT(1) 96#define RT5033_CTRL_LDOOMS_MASK BIT(2) 97#define RT5033_CTRL_SLDOOMS_MASK BIT(3) 98#define RT5033_CTRL_EN_BUCK_MASK BIT(4) 99#define RT5033_CTRL_EN_LDO_MASK BIT(5) 100#define RT5033_CTRL_EN_SAFE_LDO_MASK BIT(6) 101#define RT5033_CTRL_LDO_SLEEP_MASK BIT(7) 102 103/* RT5033 BUCK control register */ 104#define RT5033_BUCK_CTRL_MASK 0x1f 105 106/* RT5033 LDO control register */ 107#define RT5033_LDO_CTRL_MASK 0x1f 108 109/* RT5033 charger property - model, manufacturer */ 110 111#define RT5033_CHARGER_MODEL "RT5033WSC Charger" 112#define RT5033_MANUFACTURER "Richtek Technology Corporation" 113 114/* 115 * RT5033 charger fast-charge current lmits (as in CHGCTRL1 register), 116 * AICR mode limits the input current for example, 117 * the AIRC 100 mode limits the input current to 100 mA. 118 */ 119#define RT5033_AICR_100_MODE 0x20 120#define RT5033_AICR_500_MODE 0x40 121#define RT5033_AICR_700_MODE 0x60 122#define RT5033_AICR_900_MODE 0x80 123#define RT5033_AICR_1500_MODE 0xc0 124#define RT5033_AICR_2000_MODE 0xe0 125#define RT5033_AICR_MODE_MASK 0xe0 126 127/* RT5033 use internal timer need to set time */ 128#define RT5033_FAST_CHARGE_TIMER4 0x00 129#define RT5033_FAST_CHARGE_TIMER6 0x01 130#define RT5033_FAST_CHARGE_TIMER8 0x02 131#define RT5033_FAST_CHARGE_TIMER9 0x03 132#define RT5033_FAST_CHARGE_TIMER12 0x04 133#define RT5033_FAST_CHARGE_TIMER14 0x05 134#define RT5033_FAST_CHARGE_TIMER16 0x06 135 136#define RT5033_INT_TIMER_ENABLE 0x01 137 138/* RT5033 charger termination enable mask */ 139#define RT5033_TE_ENABLE_MASK 0x08 140 141/* 142 * RT5033 charger opa mode. RT50300 have two opa mode charger mode 143 * and boost mode for OTG 144 */ 145 146#define RT5033_CHARGER_MODE 0x00 147#define RT5033_BOOST_MODE 0x01 148 149/* RT5033 charger termination enable */ 150#define RT5033_TE_ENABLE 0x08 151 152/* RT5033 charger CFO enable */ 153#define RT5033_CFO_ENABLE 0x40 154 155/* RT5033 charger constant charge voltage (as in CHGCTRL2 register), uV */ 156#define RT5033_CHARGER_CONST_VOLTAGE_LIMIT_MIN 3650000U 157#define RT5033_CHARGER_CONST_VOLTAGE_STEP_NUM 25000U 158#define RT5033_CHARGER_CONST_VOLTAGE_LIMIT_MAX 4400000U 159 160/* RT5033 charger pre-charge current limits (as in CHGCTRL4 register), uA */ 161#define RT5033_CHARGER_PRE_CURRENT_LIMIT_MIN 350000U 162#define RT5033_CHARGER_PRE_CURRENT_STEP_NUM 100000U 163#define RT5033_CHARGER_PRE_CURRENT_LIMIT_MAX 650000U 164 165/* RT5033 charger fast-charge current (as in CHGCTRL5 register), uA */ 166#define RT5033_CHARGER_FAST_CURRENT_MIN 700000U 167#define RT5033_CHARGER_FAST_CURRENT_STEP_NUM 100000U 168#define RT5033_CHARGER_FAST_CURRENT_MAX 2000000U 169 170/* 171 * RT5033 charger const-charge end of charger current ( 172 * as in CHGCTRL4 register), uA 173 */ 174#define RT5033_CHARGER_EOC_MIN 150000U 175#define RT5033_CHARGER_EOC_REF 300000U 176#define RT5033_CHARGER_EOC_STEP_NUM1 50000U 177#define RT5033_CHARGER_EOC_STEP_NUM2 100000U 178#define RT5033_CHARGER_EOC_MAX 600000U 179 180/* 181 * RT5033 charger pre-charge threshold volt limits 182 * (as in CHGCTRL5 register), uV 183 */ 184 185#define RT5033_CHARGER_PRE_THRESHOLD_LIMIT_MIN 2300000U 186#define RT5033_CHARGER_PRE_THRESHOLD_STEP_NUM 100000U 187#define RT5033_CHARGER_PRE_THRESHOLD_LIMIT_MAX 3800000U 188 189/* 190 * RT5033 charger enable UUG, If UUG enable MOS auto control by H/W charger 191 * circuit. 192 */ 193#define RT5033_CHARGER_UUG_ENABLE 0x02 194 195/* RT5033 charger High impedance mode */ 196#define RT5033_CHARGER_HZ_DISABLE 0x00 197#define RT5033_CHARGER_HZ_ENABLE 0x01 198 199/* RT5033 regulator BUCK output voltage uV */ 200#define RT5033_REGULATOR_BUCK_VOLTAGE_MIN 1000000U 201#define RT5033_REGULATOR_BUCK_VOLTAGE_MAX 3000000U 202#define RT5033_REGULATOR_BUCK_VOLTAGE_STEP 100000U 203#define RT5033_REGULATOR_BUCK_VOLTAGE_STEP_NUM 32 204 205/* RT5033 regulator LDO output voltage uV */ 206#define RT5033_REGULATOR_LDO_VOLTAGE_MIN 1200000U 207#define RT5033_REGULATOR_LDO_VOLTAGE_MAX 3000000U 208#define RT5033_REGULATOR_LDO_VOLTAGE_STEP 100000U 209#define RT5033_REGULATOR_LDO_VOLTAGE_STEP_NUM 32 210 211/* RT5033 regulator SAFE LDO output voltage uV */ 212#define RT5033_REGULATOR_SAFE_LDO_VOLTAGE 4900000U 213 214enum rt5033_fuel_reg { 215 RT5033_FUEL_REG_OCV_H = 0x00, 216 RT5033_FUEL_REG_OCV_L = 0x01, 217 RT5033_FUEL_REG_VBAT_H = 0x02, 218 RT5033_FUEL_REG_VBAT_L = 0x03, 219 RT5033_FUEL_REG_SOC_H = 0x04, 220 RT5033_FUEL_REG_SOC_L = 0x05, 221 RT5033_FUEL_REG_CTRL_H = 0x06, 222 RT5033_FUEL_REG_CTRL_L = 0x07, 223 RT5033_FUEL_REG_CRATE = 0x08, 224 RT5033_FUEL_REG_DEVICE_ID = 0x09, 225 RT5033_FUEL_REG_AVG_VOLT_H = 0x0A, 226 RT5033_FUEL_REG_AVG_VOLT_L = 0x0B, 227 RT5033_FUEL_REG_CONFIG_H = 0x0C, 228 RT5033_FUEL_REG_CONFIG_L = 0x0D, 229 /* Reserved 0x0E~0x0F */ 230 RT5033_FUEL_REG_IRQ_CTRL = 0x10, 231 RT5033_FUEL_REG_IRQ_FLAG = 0x11, 232 RT5033_FUEL_VMIN = 0x12, 233 RT5033_FUEL_SMIN = 0x13, 234 /* Reserved 0x14~0x1F */ 235 RT5033_FUEL_VGCOMP1 = 0x20, 236 RT5033_FUEL_VGCOMP2 = 0x21, 237 RT5033_FUEL_VGCOMP3 = 0x22, 238 RT5033_FUEL_VGCOMP4 = 0x23, 239 /* Reserved 0x24~0xFD */ 240 RT5033_FUEL_MFA_H = 0xFE, 241 RT5033_FUEL_MFA_L = 0xFF, 242 243 RT5033_FUEL_REG_END, 244}; 245 246/* RT5033 fuel gauge battery present property */ 247#define RT5033_FUEL_BAT_PRESENT 0x02 248 249/* RT5033 PMIC interrupts */ 250#define RT5033_PMIC_IRQ_BUCKOCP BIT(2) 251#define RT5033_PMIC_IRQ_BUCKLV BIT(3) 252#define RT5033_PMIC_IRQ_SAFELDOLV BIT(4) 253#define RT5033_PMIC_IRQ_LDOLV BIT(5) 254#define RT5033_PMIC_IRQ_OT BIT(6) 255#define RT5033_PMIC_IRQ_VDDA_UV BIT(7) 256 257#endif /* __RT5033_PRIVATE_H__ */