cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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stw481x.h (1422B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Copyright (C) 2011 ST-Ericsson SA
      4 * Written on behalf of Linaro for ST-Ericsson
      5 *
      6 * Author: Linus Walleij <linus.walleij@linaro.org>
      7 */
      8#ifndef MFD_STW481X_H
      9#define MFD_STW481X_H
     10
     11#include <linux/i2c.h>
     12#include <linux/regulator/machine.h>
     13#include <linux/regmap.h>
     14#include <linux/bitops.h>
     15
     16/* These registers are accessed from more than one driver */
     17#define STW_CONF1			0x11U
     18#define STW_CONF1_PDN_VMMC		0x01U
     19#define STW_CONF1_VMMC_MASK		0x0eU
     20#define STW_CONF1_VMMC_1_8V		0x02U
     21#define STW_CONF1_VMMC_2_85V		0x04U
     22#define STW_CONF1_VMMC_3V		0x06U
     23#define STW_CONF1_VMMC_1_85V		0x08U
     24#define STW_CONF1_VMMC_2_6V		0x0aU
     25#define STW_CONF1_VMMC_2_7V		0x0cU
     26#define STW_CONF1_VMMC_3_3V		0x0eU
     27#define STW_CONF1_MMC_LS_STATUS		0x10U
     28#define STW_PCTL_REG_LO			0x1eU
     29#define STW_PCTL_REG_HI			0x1fU
     30#define STW_CONF1_V_MONITORING		0x20U
     31#define STW_CONF1_IT_WARN		0x40U
     32#define STW_CONF1_PDN_VAUX		0x80U
     33#define STW_CONF2			0x20U
     34#define STW_CONF2_MASK_TWARN		0x01U
     35#define STW_CONF2_VMMC_EXT		0x02U
     36#define STW_CONF2_MASK_IT_WAKE_UP	0x04U
     37#define STW_CONF2_GPO1			0x08U
     38#define STW_CONF2_GPO2			0x10U
     39#define STW_VCORE_SLEEP			0x21U
     40
     41/**
     42 * struct stw481x - state holder for the Stw481x drivers
     43 * @i2c_client: corresponding I2C client
     44 * @map: regmap handle to access device registers
     45 */
     46struct stw481x {
     47	struct i2c_client	*client;
     48	struct regmap		*map;
     49};
     50
     51#endif