cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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wl1273-core.h (7887B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * include/linux/mfd/wl1273-core.h
      4 *
      5 * Some definitions for the wl1273 radio receiver/transmitter chip.
      6 *
      7 * Copyright (C) 2010 Nokia Corporation
      8 * Author: Matti J. Aaltonen <matti.j.aaltonen@nokia.com>
      9 */
     10
     11#ifndef WL1273_CORE_H
     12#define WL1273_CORE_H
     13
     14#include <linux/i2c.h>
     15#include <linux/mfd/core.h>
     16
     17#define WL1273_FM_DRIVER_NAME	"wl1273-fm"
     18#define RX71_FM_I2C_ADDR	0x22
     19
     20#define WL1273_STEREO_GET		0
     21#define WL1273_RSSI_LVL_GET		1
     22#define WL1273_IF_COUNT_GET		2
     23#define WL1273_FLAG_GET			3
     24#define WL1273_RDS_SYNC_GET		4
     25#define WL1273_RDS_DATA_GET		5
     26#define WL1273_FREQ_SET			10
     27#define WL1273_AF_FREQ_SET		11
     28#define WL1273_MOST_MODE_SET		12
     29#define WL1273_MOST_BLEND_SET		13
     30#define WL1273_DEMPH_MODE_SET		14
     31#define WL1273_SEARCH_LVL_SET		15
     32#define WL1273_BAND_SET			16
     33#define WL1273_MUTE_STATUS_SET		17
     34#define WL1273_RDS_PAUSE_LVL_SET	18
     35#define WL1273_RDS_PAUSE_DUR_SET	19
     36#define WL1273_RDS_MEM_SET		20
     37#define WL1273_RDS_BLK_B_SET		21
     38#define WL1273_RDS_MSK_B_SET		22
     39#define WL1273_RDS_PI_MASK_SET		23
     40#define WL1273_RDS_PI_SET		24
     41#define WL1273_RDS_SYSTEM_SET		25
     42#define WL1273_INT_MASK_SET		26
     43#define WL1273_SEARCH_DIR_SET		27
     44#define WL1273_VOLUME_SET		28
     45#define WL1273_AUDIO_ENABLE		29
     46#define WL1273_PCM_MODE_SET		30
     47#define WL1273_I2S_MODE_CONFIG_SET	31
     48#define WL1273_POWER_SET		32
     49#define WL1273_INTX_CONFIG_SET		33
     50#define WL1273_PULL_EN_SET		34
     51#define WL1273_HILO_SET			35
     52#define WL1273_SWITCH2FREF		36
     53#define WL1273_FREQ_DRIFT_REPORT	37
     54
     55#define WL1273_PCE_GET			40
     56#define WL1273_FIRM_VER_GET		41
     57#define WL1273_ASIC_VER_GET		42
     58#define WL1273_ASIC_ID_GET		43
     59#define WL1273_MAN_ID_GET		44
     60#define WL1273_TUNER_MODE_SET		45
     61#define WL1273_STOP_SEARCH		46
     62#define WL1273_RDS_CNTRL_SET		47
     63
     64#define WL1273_WRITE_HARDWARE_REG	100
     65#define WL1273_CODE_DOWNLOAD		101
     66#define WL1273_RESET			102
     67
     68#define WL1273_FM_POWER_MODE		254
     69#define WL1273_FM_INTERRUPT		255
     70
     71/* Transmitter API */
     72
     73#define WL1273_CHANL_SET			55
     74#define WL1273_SCAN_SPACING_SET			56
     75#define WL1273_REF_SET				57
     76#define WL1273_POWER_ENB_SET			90
     77#define WL1273_POWER_ATT_SET			58
     78#define WL1273_POWER_LEV_SET			59
     79#define WL1273_AUDIO_DEV_SET			60
     80#define WL1273_PILOT_DEV_SET			61
     81#define WL1273_RDS_DEV_SET			62
     82#define WL1273_PUPD_SET				91
     83#define WL1273_AUDIO_IO_SET			63
     84#define WL1273_PREMPH_SET			64
     85#define WL1273_MONO_SET				66
     86#define WL1273_MUTE				92
     87#define WL1273_MPX_LMT_ENABLE			67
     88#define WL1273_PI_SET				93
     89#define WL1273_ECC_SET				69
     90#define WL1273_PTY				70
     91#define WL1273_AF				71
     92#define WL1273_DISPLAY_MODE			74
     93#define WL1273_RDS_REP_SET			77
     94#define WL1273_RDS_CONFIG_DATA_SET		98
     95#define WL1273_RDS_DATA_SET			99
     96#define WL1273_RDS_DATA_ENB			94
     97#define WL1273_TA_SET				78
     98#define WL1273_TP_SET				79
     99#define WL1273_DI_SET				80
    100#define WL1273_MS_SET				81
    101#define WL1273_PS_SCROLL_SPEED			82
    102#define WL1273_TX_AUDIO_LEVEL_TEST		96
    103#define WL1273_TX_AUDIO_LEVEL_TEST_THRESHOLD	73
    104#define WL1273_TX_AUDIO_INPUT_LEVEL_RANGE_SET	54
    105#define WL1273_RX_ANTENNA_SELECT		87
    106#define WL1273_I2C_DEV_ADDR_SET			86
    107#define WL1273_REF_ERR_CALIB_PARAM_SET		88
    108#define WL1273_REF_ERR_CALIB_PERIODICITY_SET	89
    109#define WL1273_SOC_INT_TRIGGER			52
    110#define WL1273_SOC_AUDIO_PATH_SET		83
    111#define WL1273_SOC_PCMI_OVERRIDE		84
    112#define WL1273_SOC_I2S_OVERRIDE			85
    113#define WL1273_RSSI_BLOCK_SCAN_FREQ_SET		95
    114#define WL1273_RSSI_BLOCK_SCAN_START		97
    115#define WL1273_RSSI_BLOCK_SCAN_DATA_GET		5
    116#define WL1273_READ_FMANT_TUNE_VALUE		104
    117
    118#define WL1273_RDS_OFF		0
    119#define WL1273_RDS_ON		1
    120#define WL1273_RDS_RESET	2
    121
    122#define WL1273_AUDIO_DIGITAL	0
    123#define WL1273_AUDIO_ANALOG	1
    124
    125#define WL1273_MODE_RX		BIT(0)
    126#define WL1273_MODE_TX		BIT(1)
    127#define WL1273_MODE_OFF		BIT(2)
    128#define WL1273_MODE_SUSPENDED	BIT(3)
    129
    130#define WL1273_RADIO_CHILD	BIT(0)
    131#define WL1273_CODEC_CHILD	BIT(1)
    132
    133#define WL1273_RX_MONO		1
    134#define WL1273_RX_STEREO	0
    135#define WL1273_TX_MONO		0
    136#define WL1273_TX_STEREO	1
    137
    138#define WL1273_MAX_VOLUME	0xffff
    139#define WL1273_DEFAULT_VOLUME	0x78b8
    140
    141/* I2S protocol, left channel first, data width 16 bits */
    142#define WL1273_PCM_DEF_MODE		0x00
    143
    144/* Rx */
    145#define WL1273_AUDIO_ENABLE_I2S		BIT(0)
    146#define WL1273_AUDIO_ENABLE_ANALOG	BIT(1)
    147
    148/* Tx */
    149#define WL1273_AUDIO_IO_SET_ANALOG	0
    150#define WL1273_AUDIO_IO_SET_I2S		1
    151
    152#define WL1273_PUPD_SET_OFF		0x00
    153#define WL1273_PUPD_SET_ON		0x01
    154#define WL1273_PUPD_SET_RETENTION	0x10
    155
    156/* I2S mode */
    157#define WL1273_IS2_WIDTH_32	0x0
    158#define WL1273_IS2_WIDTH_40	0x1
    159#define WL1273_IS2_WIDTH_22_23	0x2
    160#define WL1273_IS2_WIDTH_23_22	0x3
    161#define WL1273_IS2_WIDTH_48	0x4
    162#define WL1273_IS2_WIDTH_50	0x5
    163#define WL1273_IS2_WIDTH_60	0x6
    164#define WL1273_IS2_WIDTH_64	0x7
    165#define WL1273_IS2_WIDTH_80	0x8
    166#define WL1273_IS2_WIDTH_96	0x9
    167#define WL1273_IS2_WIDTH_128	0xa
    168#define WL1273_IS2_WIDTH	0xf
    169
    170#define WL1273_IS2_FORMAT_STD	(0x0 << 4)
    171#define WL1273_IS2_FORMAT_LEFT	(0x1 << 4)
    172#define WL1273_IS2_FORMAT_RIGHT	(0x2 << 4)
    173#define WL1273_IS2_FORMAT_USER	(0x3 << 4)
    174
    175#define WL1273_IS2_MASTER	(0x0 << 6)
    176#define WL1273_IS2_SLAVEW	(0x1 << 6)
    177
    178#define WL1273_IS2_TRI_AFTER_SENDING	(0x0 << 7)
    179#define WL1273_IS2_TRI_ALWAYS_ACTIVE	(0x1 << 7)
    180
    181#define WL1273_IS2_SDOWS_RR	(0x0 << 8)
    182#define WL1273_IS2_SDOWS_RF	(0x1 << 8)
    183#define WL1273_IS2_SDOWS_FR	(0x2 << 8)
    184#define WL1273_IS2_SDOWS_FF	(0x3 << 8)
    185
    186#define WL1273_IS2_TRI_OPT	(0x0 << 10)
    187#define WL1273_IS2_TRI_ALWAYS	(0x1 << 10)
    188
    189#define WL1273_IS2_RATE_48K	(0x0 << 12)
    190#define WL1273_IS2_RATE_44_1K	(0x1 << 12)
    191#define WL1273_IS2_RATE_32K	(0x2 << 12)
    192#define WL1273_IS2_RATE_22_05K	(0x4 << 12)
    193#define WL1273_IS2_RATE_16K	(0x5 << 12)
    194#define WL1273_IS2_RATE_12K	(0x8 << 12)
    195#define WL1273_IS2_RATE_11_025	(0x9 << 12)
    196#define WL1273_IS2_RATE_8K	(0xa << 12)
    197#define WL1273_IS2_RATE		(0xf << 12)
    198
    199#define WL1273_I2S_DEF_MODE	(WL1273_IS2_WIDTH_32 | \
    200				 WL1273_IS2_FORMAT_STD | \
    201				 WL1273_IS2_MASTER | \
    202				 WL1273_IS2_TRI_AFTER_SENDING | \
    203				 WL1273_IS2_SDOWS_RR | \
    204				 WL1273_IS2_TRI_OPT | \
    205				 WL1273_IS2_RATE_48K)
    206
    207#define SCHAR_MIN (-128)
    208#define SCHAR_MAX 127
    209
    210#define WL1273_FR_EVENT			BIT(0)
    211#define WL1273_BL_EVENT			BIT(1)
    212#define WL1273_RDS_EVENT		BIT(2)
    213#define WL1273_BBLK_EVENT		BIT(3)
    214#define WL1273_LSYNC_EVENT		BIT(4)
    215#define WL1273_LEV_EVENT		BIT(5)
    216#define WL1273_IFFR_EVENT		BIT(6)
    217#define WL1273_PI_EVENT			BIT(7)
    218#define WL1273_PD_EVENT			BIT(8)
    219#define WL1273_STIC_EVENT		BIT(9)
    220#define WL1273_MAL_EVENT		BIT(10)
    221#define WL1273_POW_ENB_EVENT		BIT(11)
    222#define WL1273_SCAN_OVER_EVENT		BIT(12)
    223#define WL1273_ERROR_EVENT		BIT(13)
    224
    225#define TUNER_MODE_STOP_SEARCH		0
    226#define TUNER_MODE_PRESET		1
    227#define TUNER_MODE_AUTO_SEEK		2
    228#define TUNER_MODE_AF			3
    229#define TUNER_MODE_AUTO_SEEK_PI		4
    230#define TUNER_MODE_AUTO_SEEK_BULK	5
    231
    232#define RDS_BLOCK_SIZE	3
    233
    234struct wl1273_fm_platform_data {
    235	int (*request_resources) (struct i2c_client *client);
    236	void (*free_resources) (void);
    237	void (*enable) (void);
    238	void (*disable) (void);
    239
    240	u8 forbidden_modes;
    241	unsigned int children;
    242};
    243
    244#define WL1273_FM_CORE_CELLS	2
    245
    246#define WL1273_BAND_OTHER	0
    247#define WL1273_BAND_JAPAN	1
    248
    249#define WL1273_BAND_JAPAN_LOW	76000
    250#define WL1273_BAND_JAPAN_HIGH	90000
    251#define WL1273_BAND_OTHER_LOW	87500
    252#define WL1273_BAND_OTHER_HIGH	108000
    253
    254#define WL1273_BAND_TX_LOW	76000
    255#define WL1273_BAND_TX_HIGH	108000
    256
    257struct wl1273_core {
    258	struct mfd_cell cells[WL1273_FM_CORE_CELLS];
    259	struct wl1273_fm_platform_data *pdata;
    260
    261	unsigned int mode;
    262	unsigned int i2s_mode;
    263	unsigned int volume;
    264	unsigned int audio_mode;
    265	unsigned int channel_number;
    266	struct mutex lock; /* for serializing fm radio operations */
    267
    268	struct i2c_client *client;
    269
    270	int (*read)(struct wl1273_core *core, u8, u16 *);
    271	int (*write)(struct wl1273_core *core, u8, u16);
    272	int (*write_data)(struct wl1273_core *core, u8 *, u16);
    273	int (*set_audio)(struct wl1273_core *core, unsigned int);
    274	int (*set_volume)(struct wl1273_core *core, unsigned int);
    275};
    276
    277#endif	/* ifndef WL1273_CORE_H */