cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

micrel_phy.h (1927B)


      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 * include/linux/micrel_phy.h
      4 *
      5 * Micrel PHY IDs
      6 */
      7
      8#ifndef _MICREL_PHY_H
      9#define _MICREL_PHY_H
     10
     11#define MICREL_PHY_ID_MASK	0x00fffff0
     12
     13#define PHY_ID_KSZ8873MLL	0x000e7237
     14#define PHY_ID_KSZ9021		0x00221610
     15#define PHY_ID_KSZ9021RLRN	0x00221611
     16#define PHY_ID_KS8737		0x00221720
     17#define PHY_ID_KSZ8021		0x00221555
     18#define PHY_ID_KSZ8031		0x00221556
     19#define PHY_ID_KSZ8041		0x00221510
     20/* undocumented */
     21#define PHY_ID_KSZ8041RNLI	0x00221537
     22#define PHY_ID_KSZ8051		0x00221550
     23/* same id: ks8001 Rev. A/B, and ks8721 Rev 3. */
     24#define PHY_ID_KSZ8001		0x0022161A
     25/* same id: KS8081, KS8091 */
     26#define PHY_ID_KSZ8081		0x00221560
     27#define PHY_ID_KSZ8061		0x00221570
     28#define PHY_ID_KSZ9031		0x00221620
     29#define PHY_ID_KSZ9131		0x00221640
     30#define PHY_ID_LAN8814		0x00221660
     31#define PHY_ID_LAN8804		0x00221670
     32
     33#define PHY_ID_KSZ886X		0x00221430
     34#define PHY_ID_KSZ8863		0x00221435
     35
     36#define PHY_ID_KSZ87XX		0x00221550
     37
     38#define	PHY_ID_KSZ9477		0x00221631
     39
     40/* struct phy_device dev_flags definitions */
     41#define MICREL_PHY_50MHZ_CLK	0x00000001
     42#define MICREL_PHY_FXEN		0x00000002
     43#define MICREL_KSZ8_P1_ERRATA	0x00000003
     44
     45#define MICREL_KSZ9021_EXTREG_CTRL	0xB
     46#define MICREL_KSZ9021_EXTREG_DATA_WRITE	0xC
     47#define MICREL_KSZ9021_RGMII_CLK_CTRL_PAD_SCEW	0x104
     48#define MICREL_KSZ9021_RGMII_RX_DATA_PAD_SCEW	0x105
     49
     50/* Device specific MII_BMCR (Reg 0) bits */
     51/* 1 = HP Auto MDI/MDI-X mode, 0 = Microchip Auto MDI/MDI-X mode */
     52#define KSZ886X_BMCR_HP_MDIX			BIT(5)
     53/* 1 = Force MDI (transmit on RXP/RXM pins), 0 = Normal operation
     54 * (transmit on TXP/TXM pins)
     55 */
     56#define KSZ886X_BMCR_FORCE_MDI			BIT(4)
     57/* 1 = Disable auto MDI-X */
     58#define KSZ886X_BMCR_DISABLE_AUTO_MDIX		BIT(3)
     59#define KSZ886X_BMCR_DISABLE_FAR_END_FAULT	BIT(2)
     60#define KSZ886X_BMCR_DISABLE_TRANSMIT		BIT(1)
     61#define KSZ886X_BMCR_DISABLE_LED		BIT(0)
     62
     63#define KSZ886X_CTRL_MDIX_STAT			BIT(4)
     64
     65#endif /* _MICREL_PHY_H */