doc2000.h (5505B)
1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * Linux driver for Disk-On-Chip devices 4 * 5 * Copyright © 1999 Machine Vision Holdings, Inc. 6 * Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org> 7 * Copyright © 2002-2003 Greg Ungerer <gerg@snapgear.com> 8 * Copyright © 2002-2003 SnapGear Inc 9 */ 10 11#ifndef __MTD_DOC2000_H__ 12#define __MTD_DOC2000_H__ 13 14#include <linux/mtd/mtd.h> 15#include <linux/mutex.h> 16 17#define DoC_Sig1 0 18#define DoC_Sig2 1 19 20#define DoC_ChipID 0x1000 21#define DoC_DOCStatus 0x1001 22#define DoC_DOCControl 0x1002 23#define DoC_FloorSelect 0x1003 24#define DoC_CDSNControl 0x1004 25#define DoC_CDSNDeviceSelect 0x1005 26#define DoC_ECCConf 0x1006 27#define DoC_2k_ECCStatus 0x1007 28 29#define DoC_CDSNSlowIO 0x100d 30#define DoC_ECCSyndrome0 0x1010 31#define DoC_ECCSyndrome1 0x1011 32#define DoC_ECCSyndrome2 0x1012 33#define DoC_ECCSyndrome3 0x1013 34#define DoC_ECCSyndrome4 0x1014 35#define DoC_ECCSyndrome5 0x1015 36#define DoC_AliasResolution 0x101b 37#define DoC_ConfigInput 0x101c 38#define DoC_ReadPipeInit 0x101d 39#define DoC_WritePipeTerm 0x101e 40#define DoC_LastDataRead 0x101f 41#define DoC_NOP 0x1020 42 43#define DoC_Mil_CDSN_IO 0x0800 44#define DoC_2k_CDSN_IO 0x1800 45 46#define DoC_Mplus_NOP 0x1002 47#define DoC_Mplus_AliasResolution 0x1004 48#define DoC_Mplus_DOCControl 0x1006 49#define DoC_Mplus_AccessStatus 0x1008 50#define DoC_Mplus_DeviceSelect 0x1008 51#define DoC_Mplus_Configuration 0x100a 52#define DoC_Mplus_OutputControl 0x100c 53#define DoC_Mplus_FlashControl 0x1020 54#define DoC_Mplus_FlashSelect 0x1022 55#define DoC_Mplus_FlashCmd 0x1024 56#define DoC_Mplus_FlashAddress 0x1026 57#define DoC_Mplus_FlashData0 0x1028 58#define DoC_Mplus_FlashData1 0x1029 59#define DoC_Mplus_ReadPipeInit 0x102a 60#define DoC_Mplus_LastDataRead 0x102c 61#define DoC_Mplus_LastDataRead1 0x102d 62#define DoC_Mplus_WritePipeTerm 0x102e 63#define DoC_Mplus_ECCSyndrome0 0x1040 64#define DoC_Mplus_ECCSyndrome1 0x1041 65#define DoC_Mplus_ECCSyndrome2 0x1042 66#define DoC_Mplus_ECCSyndrome3 0x1043 67#define DoC_Mplus_ECCSyndrome4 0x1044 68#define DoC_Mplus_ECCSyndrome5 0x1045 69#define DoC_Mplus_ECCConf 0x1046 70#define DoC_Mplus_Toggle 0x1046 71#define DoC_Mplus_DownloadStatus 0x1074 72#define DoC_Mplus_CtrlConfirm 0x1076 73#define DoC_Mplus_Power 0x1fff 74 75/* How to access the device? 76 * On ARM, it'll be mmap'd directly with 32-bit wide accesses. 77 * On PPC, it's mmap'd and 16-bit wide. 78 * Others use readb/writeb 79 */ 80#if defined(__arm__) 81static inline u8 ReadDOC_(u32 __iomem *addr, unsigned long reg) 82{ 83 return __raw_readl(addr + reg); 84} 85static inline void WriteDOC_(u8 data, u32 __iomem *addr, unsigned long reg) 86{ 87 __raw_writel(data, addr + reg); 88 wmb(); 89} 90#define DOC_IOREMAP_LEN 0x8000 91#elif defined(__ppc__) 92static inline u8 ReadDOC_(u16 __iomem *addr, unsigned long reg) 93{ 94 return __raw_readw(addr + reg); 95} 96static inline void WriteDOC_(u8 data, u16 __iomem *addr, unsigned long reg) 97{ 98 __raw_writew(data, addr + reg); 99 wmb(); 100} 101#define DOC_IOREMAP_LEN 0x4000 102#else 103#define ReadDOC_(adr, reg) readb((void __iomem *)(adr) + (reg)) 104#define WriteDOC_(d, adr, reg) writeb(d, (void __iomem *)(adr) + (reg)) 105#define DOC_IOREMAP_LEN 0x2000 106 107#endif 108 109#if defined(__i386__) || defined(__x86_64__) 110#define USE_MEMCPY 111#endif 112 113/* These are provided to directly use the DoC_xxx defines */ 114#define ReadDOC(adr, reg) ReadDOC_(adr,DoC_##reg) 115#define WriteDOC(d, adr, reg) WriteDOC_(d,adr,DoC_##reg) 116 117#define DOC_MODE_RESET 0 118#define DOC_MODE_NORMAL 1 119#define DOC_MODE_RESERVED1 2 120#define DOC_MODE_RESERVED2 3 121 122#define DOC_MODE_CLR_ERR 0x80 123#define DOC_MODE_RST_LAT 0x10 124#define DOC_MODE_BDECT 0x08 125#define DOC_MODE_MDWREN 0x04 126 127#define DOC_ChipID_Doc2k 0x20 128#define DOC_ChipID_Doc2kTSOP 0x21 /* internal number for MTD */ 129#define DOC_ChipID_DocMil 0x30 130#define DOC_ChipID_DocMilPlus32 0x40 131#define DOC_ChipID_DocMilPlus16 0x41 132 133#define CDSN_CTRL_FR_B 0x80 134#define CDSN_CTRL_FR_B0 0x40 135#define CDSN_CTRL_FR_B1 0x80 136 137#define CDSN_CTRL_ECC_IO 0x20 138#define CDSN_CTRL_FLASH_IO 0x10 139#define CDSN_CTRL_WP 0x08 140#define CDSN_CTRL_ALE 0x04 141#define CDSN_CTRL_CLE 0x02 142#define CDSN_CTRL_CE 0x01 143 144#define DOC_ECC_RESET 0 145#define DOC_ECC_ERROR 0x80 146#define DOC_ECC_RW 0x20 147#define DOC_ECC__EN 0x08 148#define DOC_TOGGLE_BIT 0x04 149#define DOC_ECC_RESV 0x02 150#define DOC_ECC_IGNORE 0x01 151 152#define DOC_FLASH_CE 0x80 153#define DOC_FLASH_WP 0x40 154#define DOC_FLASH_BANK 0x02 155 156/* We have to also set the reserved bit 1 for enable */ 157#define DOC_ECC_EN (DOC_ECC__EN | DOC_ECC_RESV) 158#define DOC_ECC_DIS (DOC_ECC_RESV) 159 160struct Nand { 161 char floor, chip; 162 unsigned long curadr; 163 unsigned char curmode; 164 /* Also some erase/write/pipeline info when we get that far */ 165}; 166 167#define MAX_FLOORS 4 168#define MAX_CHIPS 4 169 170#define MAX_FLOORS_MIL 1 171#define MAX_CHIPS_MIL 1 172 173#define MAX_FLOORS_MPLUS 2 174#define MAX_CHIPS_MPLUS 1 175 176#define ADDR_COLUMN 1 177#define ADDR_PAGE 2 178#define ADDR_COLUMN_PAGE 3 179 180struct DiskOnChip { 181 unsigned long physadr; 182 void __iomem *virtadr; 183 unsigned long totlen; 184 unsigned char ChipID; /* Type of DiskOnChip */ 185 int ioreg; 186 187 unsigned long mfr; /* Flash IDs - only one type of flash per device */ 188 unsigned long id; 189 int chipshift; 190 char page256; 191 char pageadrlen; 192 char interleave; /* Internal interleaving - Millennium Plus style */ 193 unsigned long erasesize; 194 195 int curfloor; 196 int curchip; 197 198 int numchips; 199 struct Nand *chips; 200 struct mtd_info *nextdoc; 201 struct mutex lock; 202}; 203 204int doc_decode_ecc(unsigned char sector[512], unsigned char ecc1[6]); 205 206#endif /* __MTD_DOC2000_H__ */