cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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onenand.h (7974B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 *  linux/include/linux/mtd/onenand.h
      4 *
      5 *  Copyright © 2005-2009 Samsung Electronics
      6 *  Kyungmin Park <kyungmin.park@samsung.com>
      7 */
      8
      9#ifndef __LINUX_MTD_ONENAND_H
     10#define __LINUX_MTD_ONENAND_H
     11
     12#include <linux/spinlock.h>
     13#include <linux/completion.h>
     14#include <linux/mtd/flashchip.h>
     15#include <linux/mtd/onenand_regs.h>
     16#include <linux/mtd/bbm.h>
     17
     18#define MAX_DIES		2
     19#define MAX_BUFFERRAM		2
     20
     21/* Scan and identify a OneNAND device */
     22extern int onenand_scan(struct mtd_info *mtd, int max_chips);
     23/* Free resources held by the OneNAND device */
     24extern void onenand_release(struct mtd_info *mtd);
     25
     26/**
     27 * struct onenand_bufferram - OneNAND BufferRAM Data
     28 * @blockpage:		block & page address in BufferRAM
     29 */
     30struct onenand_bufferram {
     31	int	blockpage;
     32};
     33
     34/**
     35 * struct onenand_chip - OneNAND Private Flash Chip Data
     36 * @base:		[BOARDSPECIFIC] address to access OneNAND
     37 * @dies:		[INTERN][FLEX-ONENAND] number of dies on chip
     38 * @boundary:		[INTERN][FLEX-ONENAND] Boundary of the dies
     39 * @diesize:		[INTERN][FLEX-ONENAND] Size of the dies
     40 * @chipsize:		[INTERN] the size of one chip for multichip arrays
     41 *			FIXME For Flex-OneNAND, chipsize holds maximum possible
     42 *			device size ie when all blocks are considered MLC
     43 * @device_id:		[INTERN] device ID
     44 * @density_mask:	chip density, used for DDP devices
     45 * @verstion_id:	[INTERN] version ID
     46 * @options:		[BOARDSPECIFIC] various chip options. They can
     47 *			partly be set to inform onenand_scan about
     48 * @erase_shift:	[INTERN] number of address bits in a block
     49 * @page_shift:		[INTERN] number of address bits in a page
     50 * @page_mask:		[INTERN] a page per block mask
     51 * @writesize:		[INTERN] a real page size
     52 * @bufferram_index:	[INTERN] BufferRAM index
     53 * @bufferram:		[INTERN] BufferRAM info
     54 * @readw:		[REPLACEABLE] hardware specific function for read short
     55 * @writew:		[REPLACEABLE] hardware specific function for write short
     56 * @command:		[REPLACEABLE] hardware specific function for writing
     57 *			commands to the chip
     58 * @wait:		[REPLACEABLE] hardware specific function for wait on ready
     59 * @bbt_wait:		[REPLACEABLE] hardware specific function for bbt wait on ready
     60 * @unlock_all:		[REPLACEABLE] hardware specific function for unlock all
     61 * @read_bufferram:	[REPLACEABLE] hardware specific function for BufferRAM Area
     62 * @write_bufferram:	[REPLACEABLE] hardware specific function for BufferRAM Area
     63 * @read_word:		[REPLACEABLE] hardware specific function for read
     64 *			register of OneNAND
     65 * @write_word:		[REPLACEABLE] hardware specific function for write
     66 *			register of OneNAND
     67 * @mmcontrol:		sync burst read function
     68 * @chip_probe:		[REPLACEABLE] hardware specific function for chip probe
     69 * @block_markbad:	function to mark a block as bad
     70 * @scan_bbt:		[REPLACEALBE] hardware specific function for scanning
     71 *			Bad block Table
     72 * @chip_lock:		[INTERN] spinlock used to protect access to this
     73 *			structure and the chip
     74 * @wq:			[INTERN] wait queue to sleep on if a OneNAND
     75 *			operation is in progress
     76 * @state:		[INTERN] the current state of the OneNAND device
     77 * @page_buf:		[INTERN] page main data buffer
     78 * @oob_buf:		[INTERN] page oob data buffer
     79 * @subpagesize:	[INTERN] holds the subpagesize
     80 * @bbm:		[REPLACEABLE] pointer to Bad Block Management
     81 * @priv:		[OPTIONAL] pointer to private chip date
     82 */
     83struct onenand_chip {
     84	void __iomem		*base;
     85	unsigned		dies;
     86	unsigned		boundary[MAX_DIES];
     87	loff_t			diesize[MAX_DIES];
     88	unsigned int		chipsize;
     89	unsigned int		device_id;
     90	unsigned int		version_id;
     91	unsigned int		technology;
     92	unsigned int		density_mask;
     93	unsigned int		options;
     94	unsigned int		badblockpos;
     95
     96	unsigned int		erase_shift;
     97	unsigned int		page_shift;
     98	unsigned int		page_mask;
     99	unsigned int		writesize;
    100
    101	unsigned int		bufferram_index;
    102	struct onenand_bufferram	bufferram[MAX_BUFFERRAM];
    103
    104	int (*command)(struct mtd_info *mtd, int cmd, loff_t address, size_t len);
    105	int (*wait)(struct mtd_info *mtd, int state);
    106	int (*bbt_wait)(struct mtd_info *mtd, int state);
    107	void (*unlock_all)(struct mtd_info *mtd);
    108	int (*read_bufferram)(struct mtd_info *mtd, int area,
    109			unsigned char *buffer, int offset, size_t count);
    110	int (*write_bufferram)(struct mtd_info *mtd, int area,
    111			const unsigned char *buffer, int offset, size_t count);
    112	unsigned short (*read_word)(void __iomem *addr);
    113	void (*write_word)(unsigned short value, void __iomem *addr);
    114	void (*mmcontrol)(struct mtd_info *mtd, int sync_read);
    115	int (*chip_probe)(struct mtd_info *mtd);
    116	int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
    117	int (*scan_bbt)(struct mtd_info *mtd);
    118	int (*enable)(struct mtd_info *mtd);
    119	int (*disable)(struct mtd_info *mtd);
    120
    121	struct completion	complete;
    122	int			irq;
    123
    124	spinlock_t		chip_lock;
    125	wait_queue_head_t	wq;
    126	flstate_t		state;
    127	unsigned char		*page_buf;
    128	unsigned char		*oob_buf;
    129#ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
    130	unsigned char		*verify_buf;
    131#endif
    132
    133	int			subpagesize;
    134
    135	void			*bbm;
    136
    137	void			*priv;
    138
    139	/*
    140	 * Shows that the current operation is composed
    141	 * of sequence of commands. For example, cache program.
    142	 * Such command status OnGo bit is checked at the end of
    143	 * sequence.
    144	 */
    145	unsigned int		ongoing;
    146};
    147
    148/*
    149 * Helper macros
    150 */
    151#define ONENAND_PAGES_PER_BLOCK        (1<<6)
    152
    153#define ONENAND_CURRENT_BUFFERRAM(this)		(this->bufferram_index)
    154#define ONENAND_NEXT_BUFFERRAM(this)		(this->bufferram_index ^ 1)
    155#define ONENAND_SET_NEXT_BUFFERRAM(this)	(this->bufferram_index ^= 1)
    156#define ONENAND_SET_PREV_BUFFERRAM(this)	(this->bufferram_index ^= 1)
    157#define ONENAND_SET_BUFFERRAM0(this)		(this->bufferram_index = 0)
    158#define ONENAND_SET_BUFFERRAM1(this)		(this->bufferram_index = 1)
    159
    160#define FLEXONENAND(this)						\
    161	(this->device_id & DEVICE_IS_FLEXONENAND)
    162#define ONENAND_GET_SYS_CFG1(this)					\
    163	(this->read_word(this->base + ONENAND_REG_SYS_CFG1))
    164#define ONENAND_SET_SYS_CFG1(v, this)					\
    165	(this->write_word(v, this->base + ONENAND_REG_SYS_CFG1))
    166
    167#define ONENAND_IS_DDP(this)						\
    168	(this->device_id & ONENAND_DEVICE_IS_DDP)
    169
    170#define ONENAND_IS_MLC(this)						\
    171	(this->technology & ONENAND_TECHNOLOGY_IS_MLC)
    172
    173#ifdef CONFIG_MTD_ONENAND_2X_PROGRAM
    174#define ONENAND_IS_2PLANE(this)						\
    175	(this->options & ONENAND_HAS_2PLANE)
    176#else
    177#define ONENAND_IS_2PLANE(this)			(0)
    178#endif
    179
    180#define ONENAND_IS_CACHE_PROGRAM(this)					\
    181	(this->options & ONENAND_HAS_CACHE_PROGRAM)
    182
    183#define ONENAND_IS_NOP_1(this)						\
    184	(this->options & ONENAND_HAS_NOP_1)
    185
    186/* Check byte access in OneNAND */
    187#define ONENAND_CHECK_BYTE_ACCESS(addr)		(addr & 0x1)
    188
    189#define ONENAND_BADBLOCK_POS		0
    190
    191/*
    192 * Options bits
    193 */
    194#define ONENAND_HAS_CONT_LOCK		(0x0001)
    195#define ONENAND_HAS_UNLOCK_ALL		(0x0002)
    196#define ONENAND_HAS_2PLANE		(0x0004)
    197#define ONENAND_HAS_4KB_PAGE		(0x0008)
    198#define ONENAND_HAS_CACHE_PROGRAM	(0x0010)
    199#define ONENAND_HAS_NOP_1		(0x0020)
    200#define ONENAND_SKIP_UNLOCK_CHECK	(0x0100)
    201#define ONENAND_PAGEBUF_ALLOC		(0x1000)
    202#define ONENAND_OOBBUF_ALLOC		(0x2000)
    203#define ONENAND_SKIP_INITIAL_UNLOCKING	(0x4000)
    204
    205#define ONENAND_IS_4KB_PAGE(this)					\
    206	(this->options & ONENAND_HAS_4KB_PAGE)
    207
    208/*
    209 * OneNAND Flash Manufacturer ID Codes
    210 */
    211#define ONENAND_MFR_SAMSUNG	0xec
    212#define ONENAND_MFR_NUMONYX	0x20
    213
    214/**
    215 * struct onenand_manufacturers - NAND Flash Manufacturer ID Structure
    216 * @name:	Manufacturer name
    217 * @id:		manufacturer ID code of device.
    218*/
    219struct onenand_manufacturers {
    220        int id;
    221        char *name;
    222};
    223
    224int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
    225			 struct mtd_oob_ops *ops);
    226unsigned onenand_block(struct onenand_chip *this, loff_t addr);
    227loff_t onenand_addr(struct onenand_chip *this, int block);
    228int flexonenand_region(struct mtd_info *mtd, loff_t addr);
    229
    230struct mtd_partition;
    231
    232struct onenand_platform_data {
    233	void		(*mmcontrol)(struct mtd_info *mtd, int sync_read);
    234	int		(*read_bufferram)(struct mtd_info *mtd, int area,
    235			unsigned char *buffer, int offset, size_t count);
    236	struct mtd_partition *parts;
    237	unsigned int	nr_parts;
    238};
    239
    240#endif	/* __LINUX_MTD_ONENAND_H */