cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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iidc.h (2879B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/* Copyright (C) 2021, Intel Corporation. */
      3
      4#ifndef _IIDC_H_
      5#define _IIDC_H_
      6
      7#include <linux/auxiliary_bus.h>
      8#include <linux/dcbnl.h>
      9#include <linux/device.h>
     10#include <linux/if_ether.h>
     11#include <linux/kernel.h>
     12#include <linux/netdevice.h>
     13
     14enum iidc_event_type {
     15	IIDC_EVENT_BEFORE_MTU_CHANGE,
     16	IIDC_EVENT_AFTER_MTU_CHANGE,
     17	IIDC_EVENT_BEFORE_TC_CHANGE,
     18	IIDC_EVENT_AFTER_TC_CHANGE,
     19	IIDC_EVENT_CRIT_ERR,
     20	IIDC_EVENT_NBITS		/* must be last */
     21};
     22
     23enum iidc_reset_type {
     24	IIDC_PFR,
     25	IIDC_CORER,
     26	IIDC_GLOBR,
     27};
     28
     29enum iidc_rdma_protocol {
     30	IIDC_RDMA_PROTOCOL_IWARP = BIT(0),
     31	IIDC_RDMA_PROTOCOL_ROCEV2 = BIT(1),
     32};
     33
     34#define IIDC_MAX_USER_PRIORITY		8
     35#define IIDC_MAX_DSCP_MAPPING		64
     36#define IIDC_DSCP_PFC_MODE		0x1
     37
     38/* Struct to hold per RDMA Qset info */
     39struct iidc_rdma_qset_params {
     40	/* Qset TEID returned to the RDMA driver in
     41	 * ice_add_rdma_qset and used by RDMA driver
     42	 * for calls to ice_del_rdma_qset
     43	 */
     44	u32 teid;	/* Qset TEID */
     45	u16 qs_handle; /* RDMA driver provides this */
     46	u16 vport_id; /* VSI index */
     47	u8 tc; /* TC branch the Qset should belong to */
     48};
     49
     50struct iidc_qos_info {
     51	u64 tc_ctx;
     52	u8 rel_bw;
     53	u8 prio_type;
     54	u8 egress_virt_up;
     55	u8 ingress_virt_up;
     56};
     57
     58/* Struct to pass QoS info */
     59struct iidc_qos_params {
     60	struct iidc_qos_info tc_info[IEEE_8021QAZ_MAX_TCS];
     61	u8 up2tc[IIDC_MAX_USER_PRIORITY];
     62	u8 vport_relative_bw;
     63	u8 vport_priority_type;
     64	u8 num_tc;
     65	u8 pfc_mode;
     66	u8 dscp_map[IIDC_MAX_DSCP_MAPPING];
     67};
     68
     69struct iidc_event {
     70	DECLARE_BITMAP(type, IIDC_EVENT_NBITS);
     71	u32 reg;
     72};
     73
     74struct ice_pf;
     75
     76int ice_add_rdma_qset(struct ice_pf *pf, struct iidc_rdma_qset_params *qset);
     77int ice_del_rdma_qset(struct ice_pf *pf, struct iidc_rdma_qset_params *qset);
     78int ice_rdma_request_reset(struct ice_pf *pf, enum iidc_reset_type reset_type);
     79int ice_rdma_update_vsi_filter(struct ice_pf *pf, u16 vsi_id, bool enable);
     80void ice_get_qos_params(struct ice_pf *pf, struct iidc_qos_params *qos);
     81
     82/* Structure representing auxiliary driver tailored information about the core
     83 * PCI dev, each auxiliary driver using the IIDC interface will have an
     84 * instance of this struct dedicated to it.
     85 */
     86
     87struct iidc_auxiliary_dev {
     88	struct auxiliary_device adev;
     89	struct ice_pf *pf;
     90};
     91
     92/* structure representing the auxiliary driver. This struct is to be
     93 * allocated and populated by the auxiliary driver's owner. The core PCI
     94 * driver will access these ops by performing a container_of on the
     95 * auxiliary_device->dev.driver.
     96 */
     97struct iidc_auxiliary_drv {
     98	struct auxiliary_driver adrv;
     99	/* This event_handler is meant to be a blocking call.  For instance,
    100	 * when a BEFORE_MTU_CHANGE event comes in, the event_handler will not
    101	 * return until the auxiliary driver is ready for the MTU change to
    102	 * happen.
    103	 */
    104	void (*event_handler)(struct ice_pf *pf, struct iidc_event *event);
    105};
    106
    107#endif /* _IIDC_H_*/