cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pinconf-generic.h (9886B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Interface the generic pinconfig portions of the pinctrl subsystem
      4 *
      5 * Copyright (C) 2011 ST-Ericsson SA
      6 * Written on behalf of Linaro for ST-Ericsson
      7 * This interface is used in the core to keep track of pins.
      8 *
      9 * Author: Linus Walleij <linus.walleij@linaro.org>
     10 */
     11#ifndef __LINUX_PINCTRL_PINCONF_GENERIC_H
     12#define __LINUX_PINCTRL_PINCONF_GENERIC_H
     13
     14#include <linux/device.h>
     15#include <linux/pinctrl/machine.h>
     16
     17struct pinctrl_dev;
     18struct pinctrl_map;
     19
     20/**
     21 * enum pin_config_param - possible pin configuration parameters
     22 * @PIN_CONFIG_BIAS_BUS_HOLD: the pin will be set to weakly latch so that it
     23 *	weakly drives the last value on a tristate bus, also known as a "bus
     24 *	holder", "bus keeper" or "repeater". This allows another device on the
     25 *	bus to change the value by driving the bus high or low and switching to
     26 *	tristate. The argument is ignored.
     27 * @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a
     28 *	transition from say pull-up to pull-down implies that you disable
     29 *	pull-up in the process, this setting disables all biasing.
     30 * @PIN_CONFIG_BIAS_HIGH_IMPEDANCE: the pin will be set to a high impedance
     31 *	mode, also know as "third-state" (tristate) or "high-Z" or "floating".
     32 *	On output pins this effectively disconnects the pin, which is useful
     33 *	if for example some other pin is going to drive the signal connected
     34 *	to it for a while. Pins used for input are usually always high
     35 *	impedance.
     36 * @PIN_CONFIG_BIAS_PULL_DOWN: the pin will be pulled down (usually with high
     37 *	impedance to GROUND). If the argument is != 0 pull-down is enabled,
     38 *	if it is 0, pull-down is total, i.e. the pin is connected to GROUND.
     39 * @PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: the pin will be pulled up or down based
     40 *	on embedded knowledge of the controller hardware, like current mux
     41 *	function. The pull direction and possibly strength too will normally
     42 *	be decided completely inside the hardware block and not be readable
     43 *	from the kernel side.
     44 *	If the argument is != 0 pull up/down is enabled, if it is 0, the
     45 *	configuration is ignored. The proper way to disable it is to use
     46 *	@PIN_CONFIG_BIAS_DISABLE.
     47 * @PIN_CONFIG_BIAS_PULL_UP: the pin will be pulled up (usually with high
     48 *	impedance to VDD). If the argument is != 0 pull-up is enabled,
     49 *	if it is 0, pull-up is total, i.e. the pin is connected to VDD.
     50 * @PIN_CONFIG_DRIVE_OPEN_DRAIN: the pin will be driven with open drain (open
     51 *	collector) which means it is usually wired with other output ports
     52 *	which are then pulled up with an external resistor. Setting this
     53 *	config will enable open drain mode, the argument is ignored.
     54 * @PIN_CONFIG_DRIVE_OPEN_SOURCE: the pin will be driven with open source
     55 *	(open emitter). Setting this config will enable open source mode, the
     56 *	argument is ignored.
     57 * @PIN_CONFIG_DRIVE_PUSH_PULL: the pin will be driven actively high and
     58 *	low, this is the most typical case and is typically achieved with two
     59 *	active transistors on the output. Setting this config will enable
     60 *	push-pull mode, the argument is ignored.
     61 * @PIN_CONFIG_DRIVE_STRENGTH: the pin will sink or source at most the current
     62 *	passed as argument. The argument is in mA.
     63 * @PIN_CONFIG_DRIVE_STRENGTH_UA: the pin will sink or source at most the current
     64 *	passed as argument. The argument is in uA.
     65 * @PIN_CONFIG_INPUT_DEBOUNCE: this will configure the pin to debounce mode,
     66 *	which means it will wait for signals to settle when reading inputs. The
     67 *	argument gives the debounce time in usecs. Setting the
     68 *	argument to zero turns debouncing off.
     69 * @PIN_CONFIG_INPUT_ENABLE: enable the pin's input.  Note that this does not
     70 *	affect the pin's ability to drive output.  1 enables input, 0 disables
     71 *	input.
     72 * @PIN_CONFIG_INPUT_SCHMITT: this will configure an input pin to run in
     73 *	schmitt-trigger mode. If the schmitt-trigger has adjustable hysteresis,
     74 *	the threshold value is given on a custom format as argument when
     75 *	setting pins to this mode.
     76 * @PIN_CONFIG_INPUT_SCHMITT_ENABLE: control schmitt-trigger mode on the pin.
     77 *      If the argument != 0, schmitt-trigger mode is enabled. If it's 0,
     78 *      schmitt-trigger mode is disabled.
     79 * @PIN_CONFIG_MODE_LOW_POWER: this will configure the pin for low power
     80 *	operation, if several modes of operation are supported these can be
     81 *	passed in the argument on a custom form, else just use argument 1
     82 *	to indicate low power mode, argument 0 turns low power mode off.
     83 * @PIN_CONFIG_MODE_PWM: this will configure the pin for PWM
     84 * @PIN_CONFIG_OUTPUT: this will configure the pin as an output and drive a
     85 * 	value on the line. Use argument 1 to indicate high level, argument 0 to
     86 *	indicate low level. (Please see Documentation/driver-api/pin-control.rst,
     87 *	section "GPIO mode pitfalls" for a discussion around this parameter.)
     88 * @PIN_CONFIG_OUTPUT_ENABLE: this will enable the pin's output mode
     89 * 	without driving a value there. For most platforms this reduces to
     90 * 	enable the output buffers and then let the pin controller current
     91 * 	configuration (eg. the currently selected mux function) drive values on
     92 * 	the line. Use argument 1 to enable output mode, argument 0 to disable
     93 * 	it.
     94 * @PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS: this will configure the output impedance
     95 * 	of the pin with the value passed as argument. The argument is in ohms.
     96 * @PIN_CONFIG_PERSIST_STATE: retain pin state across sleep or controller reset
     97 * @PIN_CONFIG_POWER_SOURCE: if the pin can select between different power
     98 *	supplies, the argument to this parameter (on a custom format) tells
     99 *	the driver which alternative power source to use.
    100 * @PIN_CONFIG_SKEW_DELAY: if the pin has programmable skew rate (on inputs)
    101 *	or latch delay (on outputs) this parameter (in a custom format)
    102 *	specifies the clock skew or latch delay. It typically controls how
    103 *	many double inverters are put in front of the line.
    104 * @PIN_CONFIG_SLEEP_HARDWARE_STATE: indicate this is sleep related state.
    105 * @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to
    106 *	this parameter (on a custom format) tells the driver which alternative
    107 *	slew rate to use.
    108 * @PIN_CONFIG_END: this is the last enumerator for pin configurations, if
    109 *	you need to pass in custom configurations to the pin controller, use
    110 *	PIN_CONFIG_END+1 as the base offset.
    111 * @PIN_CONFIG_MAX: this is the maximum configuration value that can be
    112 *	presented using the packed format.
    113 */
    114enum pin_config_param {
    115	PIN_CONFIG_BIAS_BUS_HOLD,
    116	PIN_CONFIG_BIAS_DISABLE,
    117	PIN_CONFIG_BIAS_HIGH_IMPEDANCE,
    118	PIN_CONFIG_BIAS_PULL_DOWN,
    119	PIN_CONFIG_BIAS_PULL_PIN_DEFAULT,
    120	PIN_CONFIG_BIAS_PULL_UP,
    121	PIN_CONFIG_DRIVE_OPEN_DRAIN,
    122	PIN_CONFIG_DRIVE_OPEN_SOURCE,
    123	PIN_CONFIG_DRIVE_PUSH_PULL,
    124	PIN_CONFIG_DRIVE_STRENGTH,
    125	PIN_CONFIG_DRIVE_STRENGTH_UA,
    126	PIN_CONFIG_INPUT_DEBOUNCE,
    127	PIN_CONFIG_INPUT_ENABLE,
    128	PIN_CONFIG_INPUT_SCHMITT,
    129	PIN_CONFIG_INPUT_SCHMITT_ENABLE,
    130	PIN_CONFIG_MODE_LOW_POWER,
    131	PIN_CONFIG_MODE_PWM,
    132	PIN_CONFIG_OUTPUT,
    133	PIN_CONFIG_OUTPUT_ENABLE,
    134	PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS,
    135	PIN_CONFIG_PERSIST_STATE,
    136	PIN_CONFIG_POWER_SOURCE,
    137	PIN_CONFIG_SKEW_DELAY,
    138	PIN_CONFIG_SLEEP_HARDWARE_STATE,
    139	PIN_CONFIG_SLEW_RATE,
    140	PIN_CONFIG_END = 0x7F,
    141	PIN_CONFIG_MAX = 0xFF,
    142};
    143
    144/*
    145 * Helpful configuration macro to be used in tables etc.
    146 */
    147#define PIN_CONF_PACKED(p, a) ((a << 8) | ((unsigned long) p & 0xffUL))
    148
    149/*
    150 * The following inlines stuffs a configuration parameter and data value
    151 * into and out of an unsigned long argument, as used by the generic pin config
    152 * system. We put the parameter in the lower 8 bits and the argument in the
    153 * upper 24 bits.
    154 */
    155
    156static inline enum pin_config_param pinconf_to_config_param(unsigned long config)
    157{
    158	return (enum pin_config_param) (config & 0xffUL);
    159}
    160
    161static inline u32 pinconf_to_config_argument(unsigned long config)
    162{
    163	return (u32) ((config >> 8) & 0xffffffUL);
    164}
    165
    166static inline unsigned long pinconf_to_config_packed(enum pin_config_param param,
    167						     u32 argument)
    168{
    169	return PIN_CONF_PACKED(param, argument);
    170}
    171
    172#define PCONFDUMP(a, b, c, d) {					\
    173	.param = a, .display = b, .format = c, .has_arg = d	\
    174	}
    175
    176struct pin_config_item {
    177	const enum pin_config_param param;
    178	const char * const display;
    179	const char * const format;
    180	bool has_arg;
    181};
    182
    183struct pinconf_generic_params {
    184	const char * const property;
    185	enum pin_config_param param;
    186	u32 default_value;
    187};
    188
    189int pinconf_generic_dt_subnode_to_map(struct pinctrl_dev *pctldev,
    190		struct device_node *np, struct pinctrl_map **map,
    191		unsigned *reserved_maps, unsigned *num_maps,
    192		enum pinctrl_map_type type);
    193int pinconf_generic_dt_node_to_map(struct pinctrl_dev *pctldev,
    194		struct device_node *np_config, struct pinctrl_map **map,
    195		unsigned *num_maps, enum pinctrl_map_type type);
    196void pinconf_generic_dt_free_map(struct pinctrl_dev *pctldev,
    197		struct pinctrl_map *map, unsigned num_maps);
    198
    199static inline int pinconf_generic_dt_node_to_map_group(
    200		struct pinctrl_dev *pctldev, struct device_node *np_config,
    201		struct pinctrl_map **map, unsigned *num_maps)
    202{
    203	return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps,
    204			PIN_MAP_TYPE_CONFIGS_GROUP);
    205}
    206
    207static inline int pinconf_generic_dt_node_to_map_pin(
    208		struct pinctrl_dev *pctldev, struct device_node *np_config,
    209		struct pinctrl_map **map, unsigned *num_maps)
    210{
    211	return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps,
    212			PIN_MAP_TYPE_CONFIGS_PIN);
    213}
    214
    215static inline int pinconf_generic_dt_node_to_map_all(
    216		struct pinctrl_dev *pctldev, struct device_node *np_config,
    217		struct pinctrl_map **map, unsigned *num_maps)
    218{
    219	/*
    220	 * passing the type as PIN_MAP_TYPE_INVALID causes the underlying parser
    221	 * to infer the map type from the DT properties used.
    222	 */
    223	return pinconf_generic_dt_node_to_map(pctldev, np_config, map, num_maps,
    224			PIN_MAP_TYPE_INVALID);
    225}
    226
    227#endif /* __LINUX_PINCTRL_PINCONF_GENERIC_H */