cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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soc.h (1283B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Helpers for Intel SoC model detection
      4 *
      5 * Copyright (c) 2019, Intel Corporation.
      6 */
      7
      8#ifndef __PLATFORM_DATA_X86_SOC_H
      9#define __PLATFORM_DATA_X86_SOC_H
     10
     11#if IS_ENABLED(CONFIG_X86)
     12
     13#include <asm/cpu_device_id.h>
     14#include <asm/intel-family.h>
     15
     16#define SOC_INTEL_IS_CPU(soc, type)				\
     17static inline bool soc_intel_is_##soc(void)			\
     18{								\
     19	static const struct x86_cpu_id soc##_cpu_ids[] = {	\
     20		X86_MATCH_INTEL_FAM6_MODEL(type, NULL),		\
     21		{}						\
     22	};							\
     23	const struct x86_cpu_id *id;				\
     24								\
     25	id = x86_match_cpu(soc##_cpu_ids);			\
     26	if (id)							\
     27		return true;					\
     28	return false;						\
     29}
     30
     31SOC_INTEL_IS_CPU(byt, ATOM_SILVERMONT);
     32SOC_INTEL_IS_CPU(cht, ATOM_AIRMONT);
     33SOC_INTEL_IS_CPU(apl, ATOM_GOLDMONT);
     34SOC_INTEL_IS_CPU(glk, ATOM_GOLDMONT_PLUS);
     35SOC_INTEL_IS_CPU(cml, KABYLAKE_L);
     36
     37#else /* IS_ENABLED(CONFIG_X86) */
     38
     39static inline bool soc_intel_is_byt(void)
     40{
     41	return false;
     42}
     43
     44static inline bool soc_intel_is_cht(void)
     45{
     46	return false;
     47}
     48
     49static inline bool soc_intel_is_apl(void)
     50{
     51	return false;
     52}
     53
     54static inline bool soc_intel_is_glk(void)
     55{
     56	return false;
     57}
     58
     59static inline bool soc_intel_is_cml(void)
     60{
     61	return false;
     62}
     63#endif /* IS_ENABLED(CONFIG_X86) */
     64
     65#endif /* __PLATFORM_DATA_X86_SOC_H */