cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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spi-intel.h (756B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Intel PCH/PCU SPI flash driver.
      4 *
      5 * Copyright (C) 2016, Intel Corporation
      6 * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
      7 */
      8
      9#ifndef SPI_INTEL_PDATA_H
     10#define SPI_INTEL_PDATA_H
     11
     12enum intel_spi_type {
     13	INTEL_SPI_BYT = 1,
     14	INTEL_SPI_LPT,
     15	INTEL_SPI_BXT,
     16	INTEL_SPI_CNL,
     17};
     18
     19/**
     20 * struct intel_spi_boardinfo - Board specific data for Intel SPI driver
     21 * @type: Type which this controller is compatible with
     22 * @set_writeable: Try to make the chip writeable (optional)
     23 * @data: Data to be passed to @set_writeable can be %NULL
     24 */
     25struct intel_spi_boardinfo {
     26	enum intel_spi_type type;
     27	bool (*set_writeable)(void __iomem *base, void *data);
     28	void *data;
     29};
     30
     31#endif /* SPI_INTEL_PDATA_H */