cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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max8952.h (2294B)

      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 * max8952.h - Voltage regulation for the Maxim 8952
      4 *
      5 *  Copyright (C) 2010 Samsung Electrnoics
      6 *  MyungJoo Ham <myungjoo.ham@samsung.com>
      7 */
      8
      9#ifndef REGULATOR_MAX8952
     10#define REGULATOR_MAX8952
     11
     12#include <linux/regulator/machine.h>
     13
     14enum {
     15	MAX8952_DVS_MODE0,
     16	MAX8952_DVS_MODE1,
     17	MAX8952_DVS_MODE2,
     18	MAX8952_DVS_MODE3,
     19};
     20
     21enum {
     22	MAX8952_DVS_770mV = 0,
     23	MAX8952_DVS_780mV,
     24	MAX8952_DVS_790mV,
     25	MAX8952_DVS_800mV,
     26	MAX8952_DVS_810mV,
     27	MAX8952_DVS_820mV,
     28	MAX8952_DVS_830mV,
     29	MAX8952_DVS_840mV,
     30	MAX8952_DVS_850mV,
     31	MAX8952_DVS_860mV,
     32	MAX8952_DVS_870mV,
     33	MAX8952_DVS_880mV,
     34	MAX8952_DVS_890mV,
     35	MAX8952_DVS_900mV,
     36	MAX8952_DVS_910mV,
     37	MAX8952_DVS_920mV,
     38	MAX8952_DVS_930mV,
     39	MAX8952_DVS_940mV,
     40	MAX8952_DVS_950mV,
     41	MAX8952_DVS_960mV,
     42	MAX8952_DVS_970mV,
     43	MAX8952_DVS_980mV,
     44	MAX8952_DVS_990mV,
     45	MAX8952_DVS_1000mV,
     46	MAX8952_DVS_1010mV,
     47	MAX8952_DVS_1020mV,
     48	MAX8952_DVS_1030mV,
     49	MAX8952_DVS_1040mV,
     50	MAX8952_DVS_1050mV,
     51	MAX8952_DVS_1060mV,
     52	MAX8952_DVS_1070mV,
     53	MAX8952_DVS_1080mV,
     54	MAX8952_DVS_1090mV,
     55	MAX8952_DVS_1100mV,
     56	MAX8952_DVS_1110mV,
     57	MAX8952_DVS_1120mV,
     58	MAX8952_DVS_1130mV,
     59	MAX8952_DVS_1140mV,
     60	MAX8952_DVS_1150mV,
     61	MAX8952_DVS_1160mV,
     62	MAX8952_DVS_1170mV,
     63	MAX8952_DVS_1180mV,
     64	MAX8952_DVS_1190mV,
     65	MAX8952_DVS_1200mV,
     66	MAX8952_DVS_1210mV,
     67	MAX8952_DVS_1220mV,
     68	MAX8952_DVS_1230mV,
     69	MAX8952_DVS_1240mV,
     70	MAX8952_DVS_1250mV,
     71	MAX8952_DVS_1260mV,
     72	MAX8952_DVS_1270mV,
     73	MAX8952_DVS_1280mV,
     74	MAX8952_DVS_1290mV,
     75	MAX8952_DVS_1300mV,
     76	MAX8952_DVS_1310mV,
     77	MAX8952_DVS_1320mV,
     78	MAX8952_DVS_1330mV,
     79	MAX8952_DVS_1340mV,
     80	MAX8952_DVS_1350mV,
     81	MAX8952_DVS_1360mV,
     82	MAX8952_DVS_1370mV,
     83	MAX8952_DVS_1380mV,
     84	MAX8952_DVS_1390mV,
     85	MAX8952_DVS_1400mV,
     86};
     87
     88enum {
     89	MAX8952_SYNC_FREQ_26MHZ, /* Default */
     90	MAX8952_SYNC_FREQ_13MHZ,
     91	MAX8952_SYNC_FREQ_19_2MHZ,
     92};
     93
     94enum {
     95	MAX8952_RAMP_32mV_us = 0, /* Default */
     96	MAX8952_RAMP_16mV_us,
     97	MAX8952_RAMP_8mV_us,
     98	MAX8952_RAMP_4mV_us,
     99	MAX8952_RAMP_2mV_us,
    100	MAX8952_RAMP_1mV_us,
    101	MAX8952_RAMP_0_5mV_us,
    102	MAX8952_RAMP_0_25mV_us,
    103};
    104
    105#define MAX8952_NUM_DVS_MODE	4
    106
    107struct max8952_platform_data {
    108	u32 default_mode;
    109	u32 dvs_mode[MAX8952_NUM_DVS_MODE]; /* MAX8952_DVS_MODEx_XXXXmV */
    110
    111	u32 sync_freq;
    112	u32 ramp_speed;
    113
    114	struct regulator_init_data *reg_data;
    115};
    116
    117
    118#endif /* REGULATOR_MAX8952 */