cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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knav_dma.h (5601B)


      1/*
      2 * Copyright (C) 2014 Texas Instruments Incorporated
      3 * Authors:	Sandeep Nair <sandeep_n@ti.com
      4 *		Cyril Chemparathy <cyril@ti.com
      5		Santosh Shilimkar <santosh.shilimkar@ti.com>
      6 *
      7 * This program is free software; you can redistribute it and/or
      8 * modify it under the terms of the GNU General Public License as
      9 * published by the Free Software Foundation version 2.
     10 *
     11 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
     12 * kind, whether express or implied; without even the implied warranty
     13 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     14 * GNU General Public License for more details.
     15 */
     16
     17#ifndef __SOC_TI_KEYSTONE_NAVIGATOR_DMA_H__
     18#define __SOC_TI_KEYSTONE_NAVIGATOR_DMA_H__
     19
     20#include <linux/dmaengine.h>
     21
     22/*
     23 * PKTDMA descriptor manipulation macros for host packet descriptor
     24 */
     25#define MASK(x)					(BIT(x) - 1)
     26#define KNAV_DMA_DESC_PKT_LEN_MASK		MASK(22)
     27#define KNAV_DMA_DESC_PKT_LEN_SHIFT		0
     28#define KNAV_DMA_DESC_PS_INFO_IN_SOP		BIT(22)
     29#define KNAV_DMA_DESC_PS_INFO_IN_DESC		0
     30#define KNAV_DMA_DESC_TAG_MASK			MASK(8)
     31#define KNAV_DMA_DESC_SAG_HI_SHIFT		24
     32#define KNAV_DMA_DESC_STAG_LO_SHIFT		16
     33#define KNAV_DMA_DESC_DTAG_HI_SHIFT		8
     34#define KNAV_DMA_DESC_DTAG_LO_SHIFT		0
     35#define KNAV_DMA_DESC_HAS_EPIB			BIT(31)
     36#define KNAV_DMA_DESC_NO_EPIB			0
     37#define KNAV_DMA_DESC_PSLEN_SHIFT		24
     38#define KNAV_DMA_DESC_PSLEN_MASK		MASK(6)
     39#define KNAV_DMA_DESC_ERR_FLAG_SHIFT		20
     40#define KNAV_DMA_DESC_ERR_FLAG_MASK		MASK(4)
     41#define KNAV_DMA_DESC_PSFLAG_SHIFT		16
     42#define KNAV_DMA_DESC_PSFLAG_MASK		MASK(4)
     43#define KNAV_DMA_DESC_RETQ_SHIFT		0
     44#define KNAV_DMA_DESC_RETQ_MASK			MASK(14)
     45#define KNAV_DMA_DESC_BUF_LEN_MASK		MASK(22)
     46#define KNAV_DMA_DESC_EFLAGS_MASK		MASK(4)
     47#define KNAV_DMA_DESC_EFLAGS_SHIFT		20
     48
     49#define KNAV_DMA_NUM_EPIB_WORDS			4
     50#define KNAV_DMA_NUM_PS_WORDS			16
     51#define KNAV_DMA_NUM_SW_DATA_WORDS		4
     52#define KNAV_DMA_FDQ_PER_CHAN			4
     53
     54/* Tx channel scheduling priority */
     55enum knav_dma_tx_priority {
     56	DMA_PRIO_HIGH	= 0,
     57	DMA_PRIO_MED_H,
     58	DMA_PRIO_MED_L,
     59	DMA_PRIO_LOW
     60};
     61
     62/* Rx channel error handling mode during buffer starvation */
     63enum knav_dma_rx_err_mode {
     64	DMA_DROP = 0,
     65	DMA_RETRY
     66};
     67
     68/* Rx flow size threshold configuration */
     69enum knav_dma_rx_thresholds {
     70	DMA_THRESH_NONE		= 0,
     71	DMA_THRESH_0		= 1,
     72	DMA_THRESH_0_1		= 3,
     73	DMA_THRESH_0_1_2	= 7
     74};
     75
     76/* Descriptor type */
     77enum knav_dma_desc_type {
     78	DMA_DESC_HOST = 0,
     79	DMA_DESC_MONOLITHIC = 2
     80};
     81
     82/**
     83 * struct knav_dma_tx_cfg:	Tx channel configuration
     84 * @filt_einfo:			Filter extended packet info
     85 * @filt_pswords:		Filter PS words present
     86 * @knav_dma_tx_priority:	Tx channel scheduling priority
     87 */
     88struct knav_dma_tx_cfg {
     89	bool				filt_einfo;
     90	bool				filt_pswords;
     91	enum knav_dma_tx_priority	priority;
     92};
     93
     94/**
     95 * struct knav_dma_rx_cfg:	Rx flow configuration
     96 * @einfo_present:		Extended packet info present
     97 * @psinfo_present:		PS words present
     98 * @knav_dma_rx_err_mode:	Error during buffer starvation
     99 * @knav_dma_desc_type:	Host or Monolithic desc
    100 * @psinfo_at_sop:		PS word located at start of packet
    101 * @sop_offset:			Start of packet offset
    102 * @dst_q:			Destination queue for a given flow
    103 * @thresh:			Rx flow size threshold
    104 * @fdq[]:			Free desc Queue array
    105 * @sz_thresh0:			RX packet size threshold 0
    106 * @sz_thresh1:			RX packet size threshold 1
    107 * @sz_thresh2:			RX packet size threshold 2
    108 */
    109struct knav_dma_rx_cfg {
    110	bool				einfo_present;
    111	bool				psinfo_present;
    112	enum knav_dma_rx_err_mode	err_mode;
    113	enum knav_dma_desc_type		desc_type;
    114	bool				psinfo_at_sop;
    115	unsigned int			sop_offset;
    116	unsigned int			dst_q;
    117	enum knav_dma_rx_thresholds	thresh;
    118	unsigned int			fdq[KNAV_DMA_FDQ_PER_CHAN];
    119	unsigned int			sz_thresh0;
    120	unsigned int			sz_thresh1;
    121	unsigned int			sz_thresh2;
    122};
    123
    124/**
    125 * struct knav_dma_cfg:	Pktdma channel configuration
    126 * @sl_cfg:			Slave configuration
    127 * @tx:				Tx channel configuration
    128 * @rx:				Rx flow configuration
    129 */
    130struct knav_dma_cfg {
    131	enum dma_transfer_direction direction;
    132	union {
    133		struct knav_dma_tx_cfg	tx;
    134		struct knav_dma_rx_cfg	rx;
    135	} u;
    136};
    137
    138/**
    139 * struct knav_dma_desc:	Host packet descriptor layout
    140 * @desc_info:			Descriptor information like id, type, length
    141 * @tag_info:			Flow tag info written in during RX
    142 * @packet_info:		Queue Manager, policy, flags etc
    143 * @buff_len:			Buffer length in bytes
    144 * @buff:			Buffer pointer
    145 * @next_desc:			For chaining the descriptors
    146 * @orig_len:			length since 'buff_len' can be overwritten
    147 * @orig_buff:			buff pointer since 'buff' can be overwritten
    148 * @epib:			Extended packet info block
    149 * @psdata:			Protocol specific
    150 * @sw_data:			Software private data not touched by h/w
    151 */
    152struct knav_dma_desc {
    153	__le32	desc_info;
    154	__le32	tag_info;
    155	__le32	packet_info;
    156	__le32	buff_len;
    157	__le32	buff;
    158	__le32	next_desc;
    159	__le32	orig_len;
    160	__le32	orig_buff;
    161	__le32	epib[KNAV_DMA_NUM_EPIB_WORDS];
    162	__le32	psdata[KNAV_DMA_NUM_PS_WORDS];
    163	u32	sw_data[KNAV_DMA_NUM_SW_DATA_WORDS];
    164} ____cacheline_aligned;
    165
    166#if IS_ENABLED(CONFIG_KEYSTONE_NAVIGATOR_DMA)
    167void *knav_dma_open_channel(struct device *dev, const char *name,
    168				struct knav_dma_cfg *config);
    169void knav_dma_close_channel(void *channel);
    170int knav_dma_get_flow(void *channel);
    171bool knav_dma_device_ready(void);
    172#else
    173static inline void *knav_dma_open_channel(struct device *dev, const char *name,
    174				struct knav_dma_cfg *config)
    175{
    176	return (void *) NULL;
    177}
    178static inline void knav_dma_close_channel(void *channel)
    179{}
    180
    181static inline int knav_dma_get_flow(void *channel)
    182{
    183	return -EINVAL;
    184}
    185
    186static inline bool knav_dma_device_ready(void)
    187{
    188	return false;
    189}
    190
    191#endif
    192
    193#endif /* __SOC_TI_KEYSTONE_NAVIGATOR_DMA_H__ */